Freescale Semiconductor,inc.

Nxp USA, Inc.

L Mali Mahalingam

Lakshminarayan Viswanathan

Bruce McRae Green

Darrell Glenn Hill

Jaynal Abedin Molla

David F Abdo

Alexander James Elliott

William M Strom

Fernando A Santos

Margaret A Szymanowski

Mahesh K Shah

Jerry Lynn White

Brian W Condie

Sarmad K Musa

An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate opening in the semiconductor substrate that is partially defined by a recessed surface, and a thermally conductive layer disposed over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate within the active area. A method for fabricating the semiconductor device includes defining an active area, forming a gate electrode over a channel in the active area, forming a source electrode and a drain electrode in the active area on opposite sides of the gate electrode, etching a substrate opening in the semiconductor substrate that is partially defined by the recessed surface, and depositing a thermally conductive layer over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate over the channel.

Semiconductor devices with a thermally conductive layer and methods of their fabrication

Semiconductor devices with a thermally conductive layer

An embodiment of a method of attaching a semiconductor die to a substrate includes placing a bottom surface of the die over a top surface of the substrate with an intervening die attach material. The method further includes contacting a top surface of the semiconductor die and the top surface of the substrate with a conformal structure that includes a non-solid, pressure transmissive material, and applying a pressure to the conformal structure. The pressure is transmitted by the non-solid, pressure transmissive material to the top surface of the semiconductor die. The method further includes, while applying the pressure, exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter. Before placing the die over the substrate, conductive mechanical lock features may be formed on the top surface of the substrate, and/or on the bottom surface of the semiconductor die.

Semiconductor device with mechanical lock features between a semiconductor die and a substrate

An embodiment of a packaged radio frequency (RF) device includes a device substrate with a voltage reference plane, a first input lead coupled to the device substrate, a first output lead coupled to the device substrate, a first transistor die coupled to a top surface of the device substrate with a solder bond, a second die coupled to the top surface of the device substrate with a conductive epoxy that electrically couples at least one component of the second die to the voltage reference plane, and non-conductive molding compound over the top surface of the device substrate and encompassing the first transistor die, the second die, a portion of the first input lead, and a portion of the first output lead.

Packaged RF amplifier devices and methods of manufacture thereof

Packaged semiconductor devices and methods of their fabrication

A system of mold locks () is formed on a heatsink () of a packaged semiconductor to prevent/mitigate delamination. The mold locks () anchor a plastic mold compound () that forms the protective cover for the packaged semiconductor die. The mold locks () are miniaturized to allow the positioning of them within the flag portion of the heatsink () and leadframe () such that a semiconductor die can be anchored above the mold locks () formed within the flag portion of the heatsink/lead frame (). The miniaturized size of the said moldlocks (do not detract from the purpose of the die attach solder ().

Heatsink moldlocks

An embodiment of a semiconductor device includes a supporting member, a semiconductor die mounted on a portion of the supporting member, a buffer region, and a plastic encapsulation. The buffer region covers a portion of the die, and includes a resin and filler particles packed within the resin. The filler particles have a mix of filler sizes and are tightly packed within the resin. The buffer region has a first dielectric constant and a first loss tangent. The plastic encapsulation encloses at least part of the supporting member and the die. The plastic encapsulation includes a plastic material of a second dielectric constant and a second loss tangent, where the second dielectric constant is larger than the first dielectric constant and the second loss tangent is larger than the first loss tangent.

Semiconductor device with a buffer region with tightly-packed filler particles

Miniature moldlocks for heatsink or flag for an overmolded plastic package

Growing community of inventors

Scottsdale, AZ, United States of America

L Mali Mahalingam