Toyota Jidosha Kabushiki Kaisha

Denso Corporation

Kyosuke Miyagi

Jun Saito

Masaru Senoo

Hidefumi Takaya

Tsuyoshi Nishiwaki

Kimimori Hamada

Norihito Tokura

Akira Kuroyanagi

Yasushi Okura

An IGBT has an emitter region, a top body region that is formed below the emitter region, a floating region that is formed below the top body region, a bottom body region that is formed below the floating region, a trench, a gate insulating film that covers an inner face of the trench, and a gate electrode that is arranged inside the trench. When a distribution of a concentration of p-type impurities in the top body region and the floating region, which are located below the emitter region, is viewed along a thickness direction of a semiconductor substrate, the concentration of the p-type impurities decreases as a downward distance increases from an upper end of the top body region that is located below the emitter region, and assumes a local minimum value at a predetermined depth in the floating region.

IGBT and method of manufacturing the same

The invention has an object to provide an insulation gate type semiconductor device and a method for producing the same in which high breakdown voltage and compactness are achieved. The semiconductor device has a gate trench and a P floating region formed in the cell area and has a terminal trench and a P floating region formed in the terminal area. In addition, a terminal trench of three terminal trenches has a structure similar to that of the gate trench, and the other terminal trenches have a structure in which an insulation substance such as oxide silicon is filled. Also, the P floating region 51 is an area formed by implanting impurities from the bottom surface of the gate trench, and the P floating region is an area formed by implanting impurities from the bottom surface of the terminal trench.

Insulated gate semiconductor device and method for producing the same

A semiconductor 100 has a Pbody region and an Ndrift region in the order from an upper surface side thereof. A gate trench and a terminal trench passing through the Pbody region are formed. The respective trenches are surrounded with P diffusion regions at the bottom thereof. The gate trench builds a gate electrode therein. A Pdiffusion region, which is in contact with the end portion in a lengthwise direction of the gate trench and is lower in concentration than the Pbody region and the P diffusion region, is formed. The Pdiffusion region is depleted prior to the P diffusion region when the gate voltage is off. The Pdiffusion region serves as a hole supply path to the P diffusion region when the gate voltage is on.

Insulated gate-type semiconductor device having a low concentration diffusion region

Growing community of inventors

Nishikamo-gun, Japan

Kyosuke Miyagi