Spansion LLC.

Kwet Nam Wong

Sally Foong

Kevin Guan

Cheng Sim Kee

Nguk Chin Lai

Murugasan Manikam Achari

Tee-Eu Jin

Pakhorudin Hussin

A substrate surface of a semiconductor package, comprising: a plurality of product forming areas to provide mounting spaces of semiconductor chips. The substrate surface also comprises a plurality of staggered offset mesh block areas surrounding the plurality of product forming areas. The plurality of staggered offset mesh block areas minimize mold bleeding from a mold cavity of the semiconductor package to outer areas of the substrate surface.

Method and structure of minimizing mold bleeding on a substrate surface of a semiconductor package

A method and structure of minimizing mold bleeding on a substrate surface of a semiconductor package is disclosed. In one embodiment, a method includes forming a dam structure on an outer area of a substrate surface of a semiconductor package and blocking a flow of a mold material from a mold cavity of the semiconductor package to the outer area of the substrate surface using the dam structure. In another embodiment, a substrate surface of a semiconductor package includes product forming areas to provide mounting spaces of semiconductor chips and staggered offset mesh block areas surrounding the product forming areas to act as dam structures to minimize mold bleeding from a mold cavity of the semiconductor package to outer areas of the substrate surface.

A semiconductor die is provided on a spacer, the die having first and second opposite edges which extend beyond respective first and second opposite edges of the spacer, the first edge of the die extending beyond the first edge of the spacer to a lesser extent than the second edge of the die extends beyond the second edge of the spacer. Furthermore, a first semiconductor die has a plurality of bond pads thereon, a second semiconductor die has a plurality of bond pads thereon, and a substrate has a plurality of bond pads thereon. Each of a first plurality of wires connects a bond pad on the first semiconductor die with a bond pad on the second semiconductor die, and each of a second plurality of wires connects a bond pad on the second semiconductor die with a bond pad on the substrate.

Die offset die to die bonding

Die offset die to bonding

Growing community of inventors

Penang, Malaysia

Kwet Nam Wong