Industrial Technology Research Institute

Kuo-Chuan Chen

Szu-Wei Lu

Jyh-Rong Lin

Ming-Chang Shih

Ling-Chen Kung

Chia-Chung Wang

Yuh-Jiuan Lin

Ruoh-Huey Uang

Hsin-Chien Huang

Chung-Tao Chang

Hsu-Tien Hu

Ruoh-Huey Wang

Tzong-Zeng Wuh

A method for forming a wafer level package that is equipped with solder balls on a top surface and encapsulated by a stress buffer layer of an elastomeric material is disclosed. The method can be carried by first forming a plurality of solder balls on bond pads provided on a top surface of a wafer and then forming an elastomeric material layer, or any other flexible, compliant material layer to encapsulate the solder balls. The tip portions of the solder balls is then substantially exposed by an etching process of either dry etching or wet etching such that the solder balls can be connected electrically to a circuit board. The present invention further provides a wafer level package that is formed with solder balls on a top surface encapsulated in an elastomeric material layer. The elastomeric material layer serves both as a stress buffer and a thermal expansion buffer such that the integrity and reliability of IC devices severed from the wafer can be maintained.

Method for forming wafer level package

A method for forming solder bumps for a flip-chip bonding process wherein the bumps have substantially the same height and structures formed by the method are described. In the method, a pre-processed semiconductor substrate that has a plurality of metal traces formed on a top surface is first provided. At least two solder non-wettable masking strips are then deposited on top of and perpendicular to the plurality of metal traces. The at least two solder non-wettable masking strips are deposited spaced-apart at a predetermined spacing sufficient for forming a bond pad therein-between on the plurality of metal traces. Finally, a solder material is deposited onto the bond pads forming solder bumps which are then reflown into solder balls.

Method for forming solder bumps for flip-chip bonding by using perpendicularly laid masking strips

A method for forming a wafer level package by incorporating an insulating pad of an elastic material under a dummy plug is described. In the method, a multiplicity of pads or islands formed of an elastic material is first formed on a pre-processed semiconductor substrate before a multiplicity of dummy via plugs are formed on top. The dummy via plugs are used as a support structure for building I/O redistribution lines (i.e. metal traces) thereon such that I/O bond pads may be built for supporting solder bumps or solder balls. The multiplicity of insulating pads is used for stress relief during a bonding process with the solder ball built on top without the conventional defect of cracking due to high elasticity of the material when a large area insulating layer is deposited on top. Numerous processing advantages are provided by the present invention method which includes the elimination of direct contact between an elastomeric material layer and a polyimide passivation layer such that potential cracking of the polyamide layer or breaking of I/O redistribution lines can be avoided.

Wafer level package incorporating elastomeric pads in dummy plugs

A method for fabricating a wafer level package and packages formed are disclosed. In the method, an elastomeric material layer is first deposited on top of a passivation layer by a printing, coating or laminating method to form a plurality of isolated islands. The islands may have a thickness of less than 100 &mgr;m. Metal traces for I/O redistribution are then formed to connect the isolated islands with bond pads provided on the surface of the wafer such that one bond pad is connected electrically to one isolated island. On top of the metal trace is then deposited an organic material for insulation with the metal trace on top of the isolated islands exposed. After an UBM layer is formed on top of the metal traces that are exposed on the isolated islands, solder balls of suitable size may be planted by a plating technique, a printing technique or a pick and place technique to complete the wafer level package.

Wafer level packaging method and packages formed

A multi-chip sensing device package and a method for forming such package are disclosed. The multi-chip sensing device package is built on an electrically insulative substrate such as a ceramic material, by using a thick film printing technique to print a multiplicity of bonding pads including interconnection pads and output pads on the surface of the rigid, insulated substrate. After a plurality of sensing elements are bonded by solder to the plurality of bonding pads, the sensing device may be connected to either lead fingers of a lead frame, or to J-leads formed integral with the device for providing electrical communication with an external circuit. The device may further be packaged in a plastic housing with a top surface of the device exposing to the environment for performing its detection function.

Method for forming multi-chip sensing device and device formed

An improved crystal oscillator package is described in which the crystal oscillators are attached to ceramic substrates by means of connectors, formed from materials such as silver-platinum and silver, using thick film techniques. An optional opening in the substrate allows a liquid or gaseous medium to make easy contact with the oscillator chips' electrodes on which a biosensitive film of a specific receptor has been deposited, thereby allowing the crystals to act as detectors. In the case of the multi-oscillator module, several different detectors may be present in the same unit.

Growing community of inventors

Hsinchu, Taiwan

Kuo-Chuan Chen