Taiwan Semiconductor Manufacturing Comp. Ltd.

Raydium Semiconductor Corporation

Kun-Tai Wu

You-Hua Chou

Chen-Ming Huang

Shih-Chi Lin

Chih-Tsung Lee

Min Hao Hong

Chih-Jen Wu

Chih-Yuan Yang

Soon-Kang Huang

Chin-Hsiang Chang

Teng-Chun Tsai

Ching-Jung Yang

Kuo-Yin Lin

Hsiang-Pi Chang

Chih-I Peng

Cary Chia-Chiung Lo

Ching-San Lin

Chih-Chao Wang

Pei Tang

A method of using a polishing system includes securing a wafer to a support, wherein the wafer has a first diameter. The method further includes polishing the wafer using a first polishing pad rotating about a first axis, wherein the first polishing pad has a second diameter greater than the first diameter. The method further includes rotating the support about a second axis perpendicular to the first axis after polishing the wafer using the first polishing pad. The method further includes polishing the wafer using a second polishing pad after rotating the support, wherein the second polishing pad has a third diameter less than the first diameter. The method further includes releasing the wafer from the support following polishing the wafer using the second polishing pad.

Method of using a polishing system

A polishing system includes a wafer support that holds a wafer, the wafer having a first diameter. The polishing system further includes a first polishing pad that polishes a first region of the wafer, the first polishing pad having a second diameter greater than the first diameter. The polishing system further includes an auxiliary polishing system comprising at least one second polishing pad that polishes a second region of the wafer, wherein the second polishing pad has a third diameter less than the first diameter, and the wafer support is configured to support the wafer during use of the first polishing pad and the auxiliary polishing system.

Polishing system

Among other things, one or more techniques and/or systems are provided for cleaning a polishing module of a semiconductor polishing apparatus. Purge air flow can be supplied into the polishing module (e.g., directed towards a polishing unit, a shield, and/or other polishing components) to create turbulence air flow within the polishing module. An auxiliary exhaust can be invoked to exhaust one or more particulates removed from the polishing module by the turbulence air flow. A purge air flow cycle can be performed by cycling the purge air flow and the auxiliary exhaust between on and off states. One or more purge air flow cycles can be performed during a main air flow cycle where laminar air flow is supplied into the polishing module and exhausted using a main exhaust. In this way, one or more particulates can be cleaned from the polishing module.

Air purge cleaning for semiconductor polishing apparatus

A polishing system for polishing a semiconductor wafer includes a wafer support for holding the semiconductor wafer, and a first polishing pad for polishing a region of the semiconductor wafer. The semiconductor wafer has a first diameter, and the first polishing pad has a second diameter shorter than the first diameter.

Polishing system and polishing method

Among other things, one or more techniques and/or systems are provided for driving a body of a polishing head using an alignment gear. That is, an alignment gear, coupled to a housing of the polishing head, can transfer rotational force from the housing to the body responsive to the alignment gear being mated with a channel associated with the body. For example, the housing can supply pressure to the body, resulting in the body and the housing moving towards one another into a mated state. When the body and the housing are in the mated state, the alignment gear can mate with the channel (e.g., the alignment gear can fit within the channel). In this way, the alignment gear can drive the body by transferring rotational force to the body, resulting in the body rotating a semiconductor wafer against a polishing pad to polish the semiconductor wafer, for example.

Polishing head with alignment gear

An integrated circuit wafer dicing method is provided. The method includes forming a plurality of integrated circuits and a plurality of test-keys on a wafer substrate, wherein the plurality of test-keys are disposed between the adjacent integrated circuits; forming a patterned protective film on the wafer to cover the plurality of integrated circuits and expose the plurality of test-keys; etching the plurality of test-keys by using the patterned protective film as a mask; and dicing an area between the plurality of integrated circuits to form a plurality of discrete integrated circuit dies.

Integrated circuit wafer dicing method

An integrated circuit with an electrostatic discharge protection circuit includes a first power pad, a second power pad, at least a circuit module, and a power clamp circuit. The circuit module includes a signal pad, an internal circuit and a first bipolar transistor. A first parasitical resistance is coupled between a collector of the first bipolar transistor and the second power pad. There is at least a metal-oxide semiconductor (MOS) transistor and at least a first parasitical bipolar transistor included within the power clamp circuit.

Integrated circuit with electrostatic discharge protection circuit

An apparatus and a method for mounting a conditioning disk to a conditioning head for use in a chemical mechanical polishing apparatus. A torroidal-shaped bearing mount is fixedly mounted to a conditioning arm of the CMP apparatus for receiving a ball bearing and a cylinder rotator. A cylinder shaft is mounted inside a cylinder chamber defined by the cylinder rotator and is further equipped with a piston mounted at near a top end of the shaft which has an elastomeric gasket mounted on an outer rim for sealingly engaging a sidewall in the cylinder chamber. A disk holder is mounted to a bottom end of the cylinder shaft by a universal connector/universal mount such that the disk holder, with a conditioning disk mounted thereon, can be operated to follow a contour of the polishing disk by tilting to an angle of at least &plusmn;30&deg; from a horizontal plane.

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Hsinchu, Taiwan

Kun-Tai Wu