Kabushiki Kaisha Toshiba

Kumi Okuwada

Hiroyuki Kanaya

Hiroshi Mochizuki

Osamu Hidaka

Kyoichi Suguro

Kazuhide Abe

Tomonori Aoyama

Iwao Kunishima

Susumu Shuto

Hiroyuki Takenaka

Norihisa Arai

Tomio Katata

Shuichi Komatsu

Kazuya Nishihori

Yoshikazu Tanabe

Yoshiaki Kitaura

Sumito Ootsuki

Tetsuro Itakura

Satoshi Takayama

Hitoshi Nagato

Chiaki Tanuma

Shuzo Hirahara

Hideki Nukada

Isao Amemiya

Satoshi Matsuda

Shiroh Saitoh

Yoichi Tokai

Osamu Furukawa

Tutomu Saito

Yohachi Yamashita

Mamoru Izumi

Shunsuke Hattori

Hideyuki Kanai

Hisako Tanaka

Atsuko Kawasaki

Hidenori Shibata

Masami Sugiuchi

Hisakazu Matsumori

Fumihiko Murakami

Noriko Y Kudo

Atsuko Nakamura

Seizaburou Shimizu

A method of producing semiconductor devices is provided, which makes it possible to bury a silicon oxide without shape deterioration in device isolation trenches. The method comprises the steps of: forming an etching resistive mask over a semiconductor substrate; etching the semiconductor substrate through an opening in the etching resistive mask to form a device isolation trench; forming a coat of a silazane perhydride polymer solution over the semiconductor substrate having the device isolation trench formed therein; vaporizing a solvent from the coat and then subjecting the coat to chemical reaction to form a film of silicon oxide; removing said film of the silicon oxide leaving a residue inside said device isolation trench; and heating said silicon oxide left in said device isolation trench for densification.

Method of producing semiconductor devices

A semiconductor integrated circuit has a ferroelectric capacitor. The ferroelectric capacitor includes a first insulation film formed above a semiconductor substrate, a first electrode which is buried in a fist hole formed in the first insulation film and whose surface is flattened, a second insulation film formed above the first insulation film and having a second hole above the first electrode, a ferroelectric film formed in the second hole, and a second electrode formed in the second hole and above the ferroelectric film and flattened so as to be flush with a surface of the second insulation film.

Semiconductor integrated circuit and method for manufacturing the same

The semiconductor device is constituted in such a manner that a switching transistor having a drain region and a source region which are comprised of an impurity-diffused region is formed in the surface layer portion of a semiconductor substrate. On the semiconductor substrate containing the transistor, a first insulation film is formed, and, at the upper layer side of the first insulation film, a capacitor is formed. The capacitor is comprised of a lower electrode, an inter-electrode insulation film comprising one of ferroelectric and high-permittivity dielectric, and an upper electrode. Before the inter-electrode insulation film is formed, a second insulation film is formed so as to cover the side face portion of the inter-electrode insulation film, the second insulation film protecting the side face portion of the inter-electrode insulation film. One of the drain region and the source region and one of the upper electrode and the lower electrode of the capacitor are connected to each other by an electrode wiring. A wiring connected to the other one of the drain region and the source region is formed on the semiconductor substrate.

Semiconductor device and method for the manufacture thereof

The semiconductor device is constituted in such a manner that a switching transistor having a drain region and a source region which are comprised of an impurity-diffused region is formed in the surface layer portion of a semiconductor substrate. On the semiconductor substrate containing the transistor, a first insulation film is formed, and, at the upper layer side of the first insulation film, a capacitor is formed. The capacitor is comprised of a lower electrode, an inter-electrode insulation film comprising one of ferroelectric and high-permittivity dielectric, and an upper electrode. Before the inter-electrode insulation film is formed, a second insulation film is formed so as to cover the side face portion of the inter-electrode insulation film, the second insulation film protecting the side face portion of the inter-electrode insulation film. One of the drain region and the source region and one of the upper electrode and the lower electrode of the capacitor are connected to each other by an electrode wiring. A wiring connected to the other one of the drain region and the source region is formed on the semiconductor. substrate.

A semiconductor integrated circuit has a ferroelectric capacitor. The ferroelectric capacitor includes a first insulation film formed above a semiconductor substrate, a first electrode which is buried in a first hole formed in the first insulation film and whose surface is flattened, a second insulation film formed above the first insulation film and having a second hole above the first electrode, a ferroelectric film formed in the second hole, and a second electrode formed in the second hole and above the ferroelectric film and flattened so as to be flush with a surface of the second insulation film.

A method of manufacturing a semiconductor apparatus comprises the steps of forming, on a surface of a semiconductor substrate, an MIS transistor including a drain region and a source region each formed of an impurity diffusion region, forming an insulation film on the semiconductor substrate after the MIS transistor has been formed, selectively forming contact holes in the insulation film, embedding, into the contact hole, a capacitor contact plug having a lower end which is in contact with one of the drain region and the source region of the MIS transistor, forming a ferroelectric capacitor having a lower electrode, a ferroelectric film and an upper electrode on the insulation film after the capacitor contact plug has been formed, and forming an electric wire for establishing a connection between the upper electrode of the ferroelectric capacitor and an upper surface of the capacitor contact plug.

Method of forming a ferroelectric device

An ink-jet recording apparatus records an image onto a recording medium by flying an ink-droplet from an ink surface by a pressure of an ultrasonic beam. The apparatus including an ultrasonic generating element array having a plurality of ultrasonic elements arranged in an array for emitting ultrasonic beams, a driving device for applying a plurality of pulses having different phases from each other, and a converging device for converging the ultrasonic beams by interfering the ultrasonic beams with each other. The generating elements are simultaneously driven and sequentially shifted in an array direction, and the converging device converging the ultrasonic beams in a direction perpendicular to the array direction.

Ink-jet recording device having an ultrasonic generating element array

Semiconductor device having ferroelectric capacitor structures

An SiO.sub.2 film and a first wiring layer are arranged in this order on a GaAs substrate. A capacitor is formed on the first wiring layer. The capacitor includes a lower electrode which has a multi-layer structure consisting of a Ti layer, an Mo layer, and a Pt layer in this order from underside. The capacitor also includes a dielectric film made of strontium titanate. The capacitor further includes an upper electrode which has a multi-layer structure consisting of a WN.sub.x layer (120 nm) and a W layer (300 nm) in this order from underside. That surface of the upper electrode, which is in contact with the dielectric film, is defined by the tungsten nitride layer.

MMIC semiconductor device with WN.sub.x capacitor electrode

A semiconductor device in which an SiO.sub.2 film and a first wiring layer are arranged in this order on a GaAs substrate. A capacitor is formed on the first wiring layer. The capacitor includes a lower electrode which has a multi-layer structure consisting of a Ti layer, an Mo layer, and a Pt layer in this order from underside. The capacitor also includes a dielectric film made of strontium titanate. The capacitor further includes an upper electrode which has a multi-layer structure consisting of a WN.sub.x layer (120 um) and a W layer (300 nm) in this order from underside. That surface of the upper electrode, which is in contact with the dielectric film, is defined by the tungsten nitride layer.

Metal oxide capacitor with a WN.sub.X electrode

A ceramic capacitor includes at least two opposing electrodes, and a dielectric ceramic composition arranged between the electrodes, wherein the ceramic composition is represented by a formula (Pb.sub.1-x Ae.sub.x) (Zr.sub.1-y Ti.sub.y)O.sub.3 (wherein x represents 0.15 to 0.90, y represents 0 to 0.80, and Ae represents at least one type of an element selected from the group consisting of Ca and Sr), and has a composition in which assuming that the total number of moles of elements constituting a site A consisting of Pb and Ae is (A) and that the total number of moles of elements constituting a site B consisting of Zr and Ti is (B), (A)/(B) is 1.00 or less. The site A of the dielectric ceramic composition may be partially substituted with Ba. The dielectric ceramic composition may be obtained by adding Nb, Cu, Bi, Mn, Co, Ag, Si, Ta, Mg, Zn, W and/or Ni to a composition which is represented by a formula (Pb.sub.1-x Ae.sub.x) (Zr.sub.1-y Ti.sub.y)O.sub.3 (wherein x represents 0.15 to 0.90, y represents 0 to 0.80, and Ae represents at least one type of an element selected from the group consisting of Ca, Sr, and Ba), and in which assuming that the total number of moles of elements constituting a site A consisting of Pb and Ae is (A) and that the total number of moles of elements constituting a site B consisting of Zr and Ti is (B), (A)/(B) is 1.00 or less. The dielectric ceramic composition is preferably formed by using a powder synthesized by a hydrothermal synthesis as a material, and its grain size is preferably 3 .mu.m or less.

Ceramic capacitor

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Kawasaki, Japan

Kumi Okuwada