Samsung Electronics Co., Ltd.

Kui-Han Ko

Il-Han Park

Bong-Soon Lim

Jin-Young Kim

Joon-Young Park

June-Hong Park

Chang-Yeon Yu

Joo-Yong Park

Dong-Hun Kwak

Su-Chang Jeon

To program in a nonvolatile memory device including a cell region including first metal pads and a peripheral region including second metal pads and vertically connected to the cell region by the first metal pads and the second metal pads, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.

Nonvolatile memory device with intermediate switching transistors and programming method

To program in a nonvolatile memory device, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.

A method of operating a nonvolatile memory device is provided where the nonvolatile memory device includes a plurality of cell strings, and each cell string includes a plurality of multi-level cells. a voltage of a selected word line is sequentially changed to sequentially have a plurality of read voltages for determining threshold voltage states of the plurality of multi-level cells. A voltage of an adjacent word line adjacent to the selected word line is sequentially changed in synchronization with voltage changing time points of the selected word line. A load of the selected word line is reduced and an operation speed of the nonvolatile memory device is increased by synchronizing the voltage change of the selected word line and the voltage change of the adjacent word line in the same direction.

Nonvolatile memory device and method of operating the same

Provided is a method performed by a nonvolatile memory device, the method may include: initiating a first program operation corresponding to a first program loop among a plurality of program loops; receiving a suspend command for an urgent read operation during the first program operation; determining a recovery timing from either of a first timing contemporaneous with the receiving the suspend command, and a second timing after completion of the first program operation, based on the suspend command; and initiating a recovery at the determined recovery timing by applying a recovery voltage to a selected word line.

Nonvolatile memory device for performing urgent read operation based on suspend command and method of operating the same

An erase voltage is applied to channels of a selected string group to erase only the selected string group. A size and a number of the spare blocks for storing meta data are reduced and thus a size of the nonvolatile memory device is reduced by reducing unit capacity of the erase operation through grouping of the cell strings. Lifetime of the nonvolatile memory device is extended by having control over erasing some cell strings and not others. Control of cell strings for erasure includes allowing some control lines to float, in some embodiments. In some embodiments, ground select transistors with different thresholds and appropriately applied voltages are used to control erasure of particular cell strings. In some embodiments, biasing of word lines is applied differently to portions of a particular cell string to only erase a portion of the particular cell string.

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Seoul, South Korea

Kui-Han Ko