Renesas Electronics Corporation

Kotaro Kihara

Tadashi Yamaguchi

Kenji Kawai

Tomonori Okudaira

Keiichiro Kashihara

Tatsunori Murata

Toshiaki Tsutsumi

Kazuhito Ichinose

Kazumasa Yonekura

Satoshi Ogino

Yoshihiro Miyagawa

A process for burying a tungsten member into a blind hole formed in a wafer, in which blind hole a through via is to be made. Film-formation (for forming the tungsten member) is carried out to position, at the periphery of the wafer, the outer circumference of the tungsten member inside the outer circumference of a barrier metal beneath the tungsten film. This process makes it possible to bury the tungsten member, which may be relatively thin, into the blind hole, which may be relatively large, so as to decrease a warp of the wafer and further prevent an underlying layer beneath the tungsten member from being peeled at the periphery of the wafer.

Method of forming a via in a semiconductor device

To improve the performance of semiconductor devices. Over an n-type semiconductor region for source/drain of an n-channel type MISFET and a first gate electrode, and over a p-type semiconductor region for source/drain of a p-channel type MISFET and a second gate electrode, which are formed over a semiconductor substrate, a metal silicide layer including nickel platinum silicide is formed by a salicide process. After that, a tensile stress film is formed over the whole face of the semiconductor substrate, and then the tensile stress film over the p-channel type MISFET is removed by dry-etching, and, after a compression stress film is formed over the whole face of the semiconductor substrate, the compression stress film over the n-channel type MISFET is removed by dry-etching. The Pt concentration in the metal silicide layer is highest at the surface, and becomes lower as the depth from the surface increases.

Semiconductor device and method of manufacturing same

Growing community of inventors

Kawasaki-shi, Japan

Kotaro Kihara