Nippondenso Co., Ltd.

Denso Corporation

Koki Mizuno

Yasutoshi Suzuki

Hiroshi Okada

Minekazu Sakai

Inao Toyoda

Tsuyoshi Fukada

Hiroshi Tanaka

Motoki Ito

Kenichi Yokoyama

Kazuhisa Ikeda

Yoshitsugu Abe

Yukio Tsuzuki

Yukihiko Tanizawa

Masakazu Kanosue

An etching method for a silicon substrate, which can easily smooth the etching surface of the (110)-oriented silicon, is disclosed. A container is filled with KOH solution. In the KOH solution is immersed a (110)-oriented silicon wafer having a PN junction and is also disposed a platinum electrode plate to face the silicon wafer. To between a platinum electrode of the silicon wafer and the platinum electrode plate are connected a constant voltage power source, an ammeter and a contact in series. A controller starts etching from one surface on which the PN junction is formed, and terminates voltage application when the specified time lapses after the formation of an anodic oxide film is equilibrated with the etching of the anodic oxide film on the etching surface on the PN junction part. In this case, the controller detects flowing current through the ammeter, and the point of time when the equilibrium state is obtained is the point of inflection of the detected current to the constant current after the peak thereof.

Electrochemical etching method for silicon substrate having PN junction

Etching method for silicon substrates and semiconductor sensor

A pair of signal voltages outputted from a bridge circuit composed of plural strain gauges are linearly amplified individually by a pair of amplifiers, whereupon a difference between the pair of signal voltages is detected. The pair of amplifiers are formed respectively in regions that are symmetrical with each other on a chip. As a result, variations in the output characteristics between the amplifiers are decreased.

Semiconductor sensor with a built-in amplification circuit

A sunlight sensor is provided which detects sunlight by means of a semiconductor device and achieves the desired elevation angle characteristics. The sunlight sensor is implemented as a semiconductor device having p+ layers 10 and 11 as a light-responsive section and an n+ or n layer 9 as a light-nonresponsive section, and additionally having a light-detection element 2 which outputs a detection signal responsive to the amount of light received by the p+ layers 10 and 11. A light-transparent molding 4 is provided at least over the light-detection element 2, and additionally a light-cutoff mask 5 is provided on the transparent molding 4. The relative positions of the light-cutoff mask, the p+ layers 10 and 11, and the n+ or n layer 9 are then established. By doing this, of the shadow of the light-cutoff mask 5 which is created when incident sunlight 13 and 14 strikes the light-detection element, the surface area of at least the part of the shadow which falls on the p+ layers 10 and 11 and the part of the shadow that falls on the n+ or n layer 9 are controlled so as to obtain the desired elevation angle characteristics.

Sunlight sensor

A process for epitaxially growing a compound semiconductor layer containing at least arsenic on a single crystal silicon substrate, which prevents the silicon impurity from intruding said compound semiconductor layer. The process comprises supplying one of the starting material gas, ASH.sub.3, into the reaction furnace to effect growth, but in such a manner that the AsH.sub.3 gas is pyrolyzed in advance to thereby supply arsenic alone either in an atomic or a molecular state. The GaAs layer is thus epitaxially grown on a single crystal silicon substrate in the crystal growing chamber, i.e., the reaction furnace in the apparatus, under an atmosphere comprising atomic or molecular arsenic at a temperature in the range of from 400.degree. to 650.degree. C. and at a vacuum degree of about 0.1 Pa. By thus epitaxially growing GaAs layer under an atmosphere comprising atomic or molecular arsenic, the intrusion of silicon impurity into the GaAs layer during its growth can be effectively prevented. Furthermore, an undoped GaAs layer, a p-GaAs layer, and an n-GaAs layer in this order can be deposited on the silicon substrate consecutively by using carbon (C) as a p-type dopant which can be supplied from trimethylgallium, thereby realizing a steep step-like junction at the n-GaAs/p-GaAs interface.

Method of making a compound semiconductor device

Growing community of inventors

Okazaki, Japan

Koki Mizuno