Shin-etsu Handotai Co., Ltd.

Koji Ebara

Tetsuya Oka

Hiroshi Takeno

Hiroki Ose

Katsuyoshi Suzuki

Shuji Takahashi

Yasuo Kasahara

A method for manufacturing a silicon wafer having a denuded zone in a surface layer by performing a heat treatment to a silicon wafer, including: a step A, performing a first rapid heat treatment of 0.01 msec or more and 100 msec or less to an upper surface layer alone of the silicon wafer to be treated at 1300&#xb0; C. or more and a silicon melting point or less by using a first heat source which heats the silicon wafer to be treated from above; and a step B, holding the silicon wafer to be treated at 1100&#xb0; C. or more and less than 1300&#xb0; C. for one second or more and 100 seconds or less by a second rapid heat treatment using a second heat source which heats the silicon wafer to be heated, and decreasing the temperature at a falling rate of 30&#xb0; C./sec or more and 150&#xb0; C./sec or less.

Method for manufacturing silicon wafer

A method for manufacturing a silicon substrate, including: performing a rapid heat treatment to a silicon substrate with a rapid-heating and rapid-cooling apparatus by maintaining the silicon substrate at a temperature that is higher than 1300&#xb0; C. and not greater than a silicon melting point for 1 to 60 seconds, the silicon substrate being sliced from a silicon single crystal ingot grown by the Czochralski method; performing a first temperature decrease process down to a temperature in the range of 600 to 800&#xb0; C. at a temperature decrease rate of 5 to 150&#xb0; C./sec; and performing a second temperature decrease process in such a manner that a cooling time of X seconds and a temperature decrease rate of Y&#xb0; C./sec meet Y&#x2266;0.15X-4.5 when X&#x3c;100 and meet Y&#x2266;10 when X&#x2267;100.

Method for manufacturing silicon substrate and silicon substrate

According to the present invention, there is provided a method for manufacturing a silicon single crystal wafer, wherein a first heat treatment for holding a silicon single crystal wafer in an oxygen containing atmosphere at a first heat treatment temperature for 1 to 60 seconds and cooling it to 800&#xb0; C. or less at a temperature falling rate of 1 to 100&#xb0; C./second by using a rapid heating/rapid cooling apparatus is performed to inwardly diffuse oxygen and form an oxygen concentration peak region near a surface of the silicon single crystal wafer, and then a second heat treatment is performed to agglomerate oxygen in the silicon single crystal wafer into the oxygen concentration peak region. As a result, it is possible to provide the method for manufacturing a silicon single crystal wafer that enables forming an excellent gettering layer close to a device forming region.

Method for manufacturing silicon single crystal wafer and electronic device

A method for manufacturing a silicon wafer having a defect-free region in a surface layer, in which at least only a surface layer region to a predetermined depth from a front surface of a silicon wafer to be processed is subjected to heat treatment at a temperature of not less than 1100 degrees C. for not less than 0.01 msec to not more than 1 sec, to thereby make the surface layer defect-free. As a result of this, there is provided a method for manufacturing a silicon wafer, in which a DZ layer without generation of crystal defects from the front surface to a constant depth can be uniformly formed, and oxide precipitates having a steep profile inside the wafer can be secured and controlled with a high degree of accuracy.

Method for manufacturing silicon wafer and silicon wafer manufactured by this method

The present invention is to provide a method for measuring resistivity of a semiconductor wafer by the use of an AC-SPV method even though the wafer is left in a depletion state or a weak inversion state. The present invention is the method for measuring resistivity of a semiconductor wafer by the use of a surface photo voltage method, and comprises the steps of: (a) measuring a surface photo voltage value in both regions of a low frequency region in which a constant surface photo voltage value is obtained irrespective of a frequency of incident light on a semiconductor wafer to be measured and in a high frequency region in which the surface photo voltage value inversely proportional to the frequency of the incident light is obtained and calculating a cut-off frequency ffrom the obtained measured value; (b) calculating a depletion layer width Wfrom capacitance Ccalculated from the surface photo voltage value in the high frequency region; (c) calculating majority carrier conductance gfrom the cut-off frequency fand the capacitance C; and (d) calculating surface potential Uand Fermi potential Ufrom the cut-off frequency f, the capacitance C, the depletion layer width W, and the majority carrier conductance g.

Method for measuring resistivity of semiconductor wafer

Performing the post-implantation annealing for recovering crystallinity in a hydrogen atmosphere can successfully suppress the surface roughening on the ion-implanted layers without pre-implantation oxidation. This allows omission of the pre-implantation oxidation and allows ion implantation using only a photoresist film as a mask in a method for producing an epitaxial wafer having buried ion-implanted layers. Since an intentional formation of an oxide film, including such pre-implantation oxidation, on an epitaxial layer is omitted, the number of repetition of the thermal history exerted to the buried ion-implanted layers can be reduced, which effectively suppresses lateral diffusion of implanted ions. Since the formation and removal of the oxide film is thus no more necessary, the number of process steps in the production of the epitaxial wafer can dramatically be reduced.

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Annaka, Japan

Koji Ebara