Kwansei Gakuin Educational Foundation

Toyota Tsusho Corporation

Toyo Tanso Co., Ltd.

Koji Ashida

Tadaaki Kaneko

Yasunori Kutsuma

Daichi Dojima

Ryo Hashimoto

Tomoya Ihara

Satoru Nogami

Satoshi Torimi

Norihito Yabuki

Masato Shinohara

Youji Teramoto

A manufacturing device of SiC semiconductor substrates includes a SiC container () in which Si vapor and C vapor are generated in the internal space during the heat treatment, and a high-temperature vacuum furnace () capable of heating the SiC container in Si atmosphere. The device can further be configured such that the SiC container is housed in Si atmosphere and an underlying substrate () is housed in the SiC container, and the high-temperature vacuum furnace is capable of heating with a temperature gradient.

Manufacturing device for SiC semiconductor substrate

Disclosed is a method for using a SiC container () in which Si vapor and C vapor are generated in the internal space during the heat treatment. The SiC container may be heated in Si atmosphere to grow an epitaxial layer of single crystalline SiC on the underlying substrate housed in the internal space. The SiC container may be heated in a TaC container of a material including TaC supplemented with a source of Si to grow an epitaxial layer of single crystalline SiC on the underlying substrate housed in the internal space.

Method of using sic container

An object of the present invention is to provide a SiC semiconductor substrate having a growth layer with a controlled step height, a manufacturing method thereof, and a manufacturing device thereof. The method includes: a growth process that grows a SiC substratein a SiC—Si equilibrium vapor pressure environment. In this way, when the SiC substrateis grown in the SiC—Si equilibrium vapor pressure environment, it is possible to provide a SiC semiconductor substrate in which the step height of the growth layer is controlled.

SiC semiconductor substrate, and, production method therefor and production device therefor

To provide a new temperature distribution evaluation method, a temperature distribution evaluation device, and a soaking range evaluation method, as the temperature distribution evaluation method which evaluates a temperature distribution of a heating areaA provided in a heating device, the present invention is a temperature distribution evaluation method which, in the heating areaA, heats a semiconductor substrateand a transmitting and receiving bodyfor transporting a raw material to and from the semiconductor substrate, and evaluates a temperature distribution of the heating areaA on the basis of a substrate thickness variation amount A of the semiconductor substrate. Accordingly, temperature distribution evaluation can be implemented for a high temperature area at 1600-2200° C. or the like at which it is hard to evaluate the temperature distribution due to the limit of a thermocouple material.

Temperature distribution evaluation method, temperature distribution evaluation device, and soaking range evaluation method

An object of the present invention is to provide a SiC semiconductor substrate capable of reducing a density of basal plane dislocations (BPD) in a growth layer, a manufacturing method thereof, and a manufacturing device thereof. The method includes: a strained layer removal process Sthat removes a strained layer introduced on a surface of a SiC substrate; and an epitaxial growth process Sthat conducts growth under a condition that a terrace width W of the SiC substrate is increased. When a SiC semiconductor substrate is manufactured in such processes, the basal plane dislocations BPD in the growth layer can be reduced, and a yield of a SiC semiconductor device can be improved.

SiC semiconductor substrate, method for manufacturing same, and device for manufacturing same

In a state in which a SiC container () of a material including polycrystalline SiC is housed in a TaC container () of a material including TaC and in which an underlying substrate () is housed in the SiC container (), the TaC container () is heated in an environment where a temperature gradient occurs in such a manner that inside of the TaC container () is at a Si vapor pressure. Consequently, C atoms sublimated by etching of the inner surface of the SiC container () are bonded to Si atoms in an atmosphere so that an epitaxial layer () of single crystalline 3C-SiC thereby grows on the underlying substrate ().

Vapour-phase epitaxial growth method, and method for producing substrate equipped with epitaxial layer

A reference sample () has a step/terrace structure made of monocrystalline SiC and a surface of each terrace has first or second stack orientation. In the reference sample (), contrast as difference in lightness and darkness between an image of a terrace with a surface directly under which the first stack orientation lies and an image of a terrace with a surface directly under which the second stack orientation lies changes according to an incident electron angle which is an angle that an electron beam emitted from a scanning electron microscope forms with a perpendicular to the terrace surface. Even when a SiC substrate has an off angle (e.g., from 1&#xb0; to 8&#xb0;), using an inclined support base () capable of correcting the off angle enables sharp contrast that reflects difference between the first and second stack orientations directly under the surface to be obtained irrespective of the off angle.

Reference sample with inclined support base, method for evaluating scanning electron microscope, and method for evaluating SiC substrate

Provided is a surface treatment method for a SiC substrate (), the method being capable of controlling whether to generate a step bunching or the type of step bunching that is generated. In the surface treatment method in which the surface of the SiC substrate () is etched by heating the SiC substrate () under Si vapor pressure, an etching mode and an etching depth which are determined at least on the basis of an etching rate, are controlled to etch the SiC substrate (), so that a surface pattern of the SiC substrate () after etching treatment is controlled.

Surface treatment method for SiC substrate

In a first step, protrusions () are formed on a surface of an SiC substrate (), and the SiC substrate () is etched. In a second step, the protrusions () of the SiC substrate () are epitaxially grown through MSE process, and an epitaxial layer () containing threading screw dislocation, which has been largely grown in the vertical (c-axis) direction as a result of MSE process, is at least partially removed. In a third step, MSE process is performed again on the SiC substrate () after the second step, to cause epitaxial layers () containing no threading screw dislocation to be grown in the horizontal (a-axis) direction to be connected at the molecular level, so that one monocrystalline 4H&#x2014;SiC semiconductor wafer () having a large area is generated throughout an Si-face or a C-face of the SiC substrate ().

Method for manufacturing semiconductor wafer

Provided is a method for controlling the rate of etching of a SiC substrate based on a composition of a storing container. The etching method of the present invention is for etching the SiC substrate by heating the SiC substrate under Si vapor pressure, in a state where the SiC substrate is stored in a crucible. The crucible is formed of a tantalum metal, and has a tantalum carbide layer provided on an internal space side of the tantalum metal, and a tantalum silicide layer provided on the side further toward the internal space side than the tantalum carbide layer. The rate of etching of the SiC substrate is controlled based on difference in a composition of the tantalum silicide layer.

Growing community of inventors

Sanda, Japan

Koji Ashida