Taiwan Semiconductor Manufacturing Comp. Ltd.

Ko-Feng Chen

Keng-Chu Lin

Mrunal Abhijith Khaderbad

Huicheng Chang

Yu-Yun Peng

Chen-Han Wang

Dhanyakumar Mahaveer Sathaiya

De-Yang Chiou

Chien-hung Lin

Zheng-Yong Liang

Hung-Yu Yen

A semiconductor device with densified dielectric structures and a method of fabricating the same are disclosed. The method includes forming a fin structure, forming an isolation structure adjacent to the fin structure, forming a source/drain (S/D) region on the fin structure, depositing a flowable dielectric layer on the isolation structure, converting the flowable dielectric layer into a non-flowable dielectric layer, performing a densification process on the non-flowable dielectric layer, and repeating the depositing, converting, and performing to form a stack of densified dielectric layers surrounding the S/D region.

Dielectric structures in semiconductor devices

A semiconductor structure includes a semiconductor substrate and an isolation structure disposed in the semiconductor substrate, wherein the isolation structure includes a first dielectric layer in contact with the semiconductor substrate and a second dielectric layer over the first dielectric layer, wherein the first dielectric layer is between the second dielectric layer and the semiconductor substrate, the first dielectric layer comprises a bottom portion and a sidewall portion, and a thickness of the bottom portion is greater than a thickness of the sidewall portion.

Semiconductor structure and method of manufacturing the same

The present disclosure describes a method of forming low thermal budget dielectrics in semiconductor devices. The method includes forming, on a substrate, first and second fin structures with an opening in between, filling the opening with a flowable isolation material, treating the flowable isolation material with a plasma, and removing a portion of the plasma-treated flowable isolation material between the first and second fin structures.

Low thermal budget dielectric for semiconductor devices

The present disclosure is directed to a method for the fabrication of isolation structures between source/drain (S/D)) epitaxial structures of stacked transistor structures. The method includes depositing an oxygen-free dielectric material in an opening over a first epitaxial structure, where the oxygen-free dielectric material covers top surfaces of the first epitaxial structure and sidewall surfaces of the opening. The method also includes exposing the oxygen-free dielectric material to an oxidizing process to oxidize the oxygen-free dielectric material so that the oxidizing process does not oxidize a portion of the oxygen-free dielectric material on the first epitaxial structure. Further, etching the oxidized oxygen-free dielectric material and forming a second epitaxial layer on the oxygen-free dielectric material not removed by the etching to substantially the opening.

Methods for manufacturing isolation layers in stacked transistor structures

A method includes performing an etching on a mask layer to form an opening in the mask layer. The mask layer is a part of a wafer. The method further includes measuring a lateral size of the opening, comparing the lateral size of the opening with a specified range, and performing a compensation etch to compensate for a difference between the lateral size and the specified range. After the compensation etch, a target layer of the wafer is etched to extend the opening into the target layer.

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Hsin-Chu, Taiwan

Ko-Feng Chen