Kabushiki Kaisha Toshiba

Tokyo Shibaura Denki Kabushiki Kaisha

Kiyoshi Hisatomi

Yuuichi Mikata

Katsunori Ishihara

Sakae Funo

Masaburo Iwabuchi

In a silicon substrate, impurity diffusion layers, serving as source and drain regions, are formed to be separated from each other. A gate insulation film is formed on the silicon substrate between these source and drain regions. The gate insulation film is a silicon oxide film containing Cl having concentration of more than 1.times.10.sup.18 atoms/cm.sup.3 and less than 2.times.10.sup.20 atoms/cm.sup.3, and the gate insulation film is formed on the silicon substrate by low-pressure CVD. A gate electrode, formed of a polysilicon layer, is formed on the gate insulation film. An inter-level insulation film is formed on a resultant structure. A contact hole is formed on each of the source and drain regions of the inter-level insulation film. A drain electrode is formed on the inter-level insulation film, and connected to the drain region through the contact hole. A source electrode is formed on the inter-level insulation film, and connected to the source region through the contact hole.

Semiconductor device having insulation film whose breakdown voltage is

The edge part of a thin disc-shaped slice, i.e., wafer, transversely cut off a single-crystal semiconductor rod is bevel machine, and then the entire surface of this wafer is mirror finished. This mirror finish is obtained by carrying out chemical etching to the ordinary depth and then carryng out polishing by means of a polishing fabric. By this process, all surfaces of the semiconductor wafer are polished to a mirror finish, and the formation of dendrite crystals on any of the surfaces is inhibited.

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Yokohama, Japan

Kiyoshi Hisatomi