Infineon Technologies Ag

Khay Chwan Andrew Saw

Chau Fatt Chiang

Norliza Morban

Chan Lam Cha

Wern Ken Daryl Wee

Thorsten Meyer

Swee Kah Lee

Chee Voon Tan

Chee Hong Lee

Cher Hau Danny Koh

Si Hao Vincent Yeo

Sock Chien Tey

Fortunato Lopez

Mei Yong Wang

Swee Kat Lee

Desmond Jenn Yong Loo

Ying Dieh Cheong

A package includes a dielectric carrier, an electronic component mounted on the dielectric carrier, and an encapsulant encapsulating at least part of the dielectric carrier and the electronic component. Corresponding methods of manufacturing the package are also described.

Semiconductor packages and methods for manufacturing thereof

A method of forming a semiconductor package includes providing a metal baseplate having a base section and a plurality of metal posts, the base section being a planar pad of substantially uniform thickness, the plurality of metal posts each extending up from a planar upper surface of the base section, mounting a semiconductor die on the upper surface of the metal baseplate, forming an encapsulant body of electrically insulating mold compound on the upper surface of the base section, electrically connecting terminals of the semiconductor die to the metal posts, and removing the base section so as to form package contacts from the metal posts at a first surface of the encapsulant body.

Semiconductor package with metal posts from structured leadframe

A semiconductor package includes a semiconductor die, an encapsulation encapsulating the semiconductor die, the encapsulation having a first side and an opposing second side, a plurality of contact pads for electrically contacting the semiconductor die, the contact pads being arranged on the first side of the encapsulation, and a plurality of inspection holes arranged in communication with the contact pads and extending from the first side to the second side, such that solder joints on the first side of the encapsulation are optically inspectable using the inspection holes viewed from the second side of the encapsulation.

Semiconductor package and method for fabricating a semiconductor package

A method includes providing a carrier, mounting a plurality of semiconductor dies on the carrier, forming a region of electrically insulating encapsulant material on the carrier that covers each of the semiconductor dies, removing sections of the encapsulant material to form gaps in the region of electrically insulating encapsulant material between each of the semiconductor dies, forming electrically conductive material within the gaps, and singulating the region of electrically insulating encapsulant material along each of the gaps to form a plurality of discrete encapsulant bodies. Each of the packaged semiconductor devices comprises a sidewall-facing terminal that is disposed on a sidewall of the encapsulant body. For each of the packaged semiconductor devices the sidewall-facing terminal is electrically connected to the semiconductor die of the respective packaged semiconductor device. The sidewall-facing terminal of each packaged semiconductor device is provided from the electrically conductive material formed within the gaps.

Semiconductor package with lead tip inspection feature

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Melaka, Malaysia

Khay Chwan Andrew Saw