Denso Corporation

Toyota Jidosha Kabushiki Kaisha

Kensaku Yamamoto

Eiichi Okuno

Narumasa Soejima

Yukihiko Watanabe

Yusuke Yamashita

Masahiro Sugimoto

Hidefumi Takaya

Takeshi Endo

Yoshihiko Ozeki

Tsuyoshi Ishikawa

Yasuo Kitou

Hiroki Watanabe

Norihito Tokura

Tsuyoshi Yamamoto

Yukio Tsuzuki

Toru Onishi

Katsunori Danno

Naohiro Suzuki

Jun Morimoto

Katsuhiro Kutsuki

Jun Kawai

Hiromichi Kinpara

Yasushi Furukawa

Shinya Nishimura

Masanori Nagaya

A manufacturing method of a silicon carbide semiconductor device may include: forming a gate insulating film on a silicon carbide substrate; and forming a gate electrode on the gate insulating film. The forming of the gate insulating film may include forming an oxide film on the silicon carbide substrate by thermally oxidizing the silicon carbide substrate under a nitrogen atmosphere.

Manufacturing method of silicon carbide semiconductor device and silicon carbide semiconductor device

A switching element may include a SiC substrate including an off-angle; a trench provided in an upper surface of the SiC substrate and extending along an off-direction of the SiC substrate in a plan view of the upper surface; a gate insulating film; and a gate electrode. The SiC substrate may include a source region of n-type; a contact region of p-type; a body region of p-type being in contact with the gate insulating film below the source region; a drift region of n-type being in contact with the gate insulating film below the body region; and low lifetime regions located in a range between the drift region and at least one of the source region and the contact region. The low lifetime regions may be arranged along the off-direction with intervals, and at least a part of the body region may be provided in the intervals.

Switching element and method of manufacturing the same

A switching element may include a semiconductor substrate, a trench, a gate insulating film, and a gate electrode. A drift region may be in contact with the gate insulating film below the body region. A bottom region may be in contact with the gate insulating film at a bottom surface of the trench. A connection region may be in contact with the gate insulating film at a side surface of the trench and connect the body region and the bottom region. The side surface of the trench may include a first side surface and a second side surface positioned below the first side surface. An inclination angle of the second side surface may be larger than an inclination angle of the first side surface. An interface between the body region and the drift region may be in contact with the gate insulating film at the first side surface.

A semiconductor device is provided with: a first conductivity type contact region; a second conductivity type body region; a first conductivity type drift region of; a trench formed through the contact region and body region from a front surface of the semiconductor substrate, wherein a bottom of the trench is positioned in the drift region; an insulating film covering an inner surface of the trench; a gate electrode accommodated in the trench in a state covered with the insulating film; and a second conductivity type floating region formed at a position deeper than the bottom of the trench, and adjacent to the bottom of the trench. The floating region includes a first layer adjacent to the bottom of the trench and a second layer formed at a position deeper than the first layer, wherein a width of the first layer is broader than a width of the second layer.

Semiconductor device and manufacturing method of semiconductor device

A manufacturing method of an SiC single crystal includes preparing an SiC substrate, implanting ions into a surface portion of the SiC substrate to form an ion implantation layer, activating the ions implanted into the surface portion of the SiC substrate by annealing, chemically etching the surface portion of the SiC substrate to form an etch pit that is caused by a threading screw dislocation included in the SiC substrate and performing an epitaxial growth of SiC to form an SiC growth layer on a surface of the SiC substrate including an inner wall of the etch pit in such a manner that portions of the SiC growth layer grown on the inner wall of the etch pit join with each other.

Manufacturing method of silicon carbide single crystal

A semiconductor device includes a semiconductor substrate and an electric field terminal part. The semiconductor substrate includes a substrate, a drift layer disposed on a surface of the substrate, and a base layer disposed on a surface of the drift layer. The semiconductor substrate is divided into a cell region in which a semiconductor element is disposed and a peripheral region that surrounds the cell region. The base region has a bottom face located on a same plane throughout the cell region and the peripheral region and provides an electric field relaxing layer located in the peripheral region. The electric field terminal part surrounds the cell region and a portion of the electric field relaxing layer and penetrates the electric field relaxing layer from a surface of the electric field relaxing layer to the drift layer.

Semiconductor device including cell region and peripheral region having high breakdown voltage structure

A direction of a dislocation line of a threading dislocation is aligned, and an angle between the direction of the dislocation line of the threading dislocation and a [0001]-orientation c-axis is equal to or smaller than 22.5 degrees. The threading dislocation having the dislocation line along with the [0001]-orientation c-axis is perpendicular to a direction of a dislocation line of a basal plane dislocation. Accordingly, the dislocation does not provide an extended dislocation on the c-face, so that a stacking fault is not generated. Thus, when an electric device is formed in a SiC single crystal substrate having the direction of the dislocation line of the threading dislocation, which is the [0001]-orientation c-axis, a SiC semiconductor device is obtained such that device characteristics are excellent without deterioration, and a manufacturing yield ration is improved.

SiC single crystal substrate, SiC single crystal epitaxial wafer, and SiC semiconductor device

A SiC semiconductor device includes: a substrate; a drift layer on a first side of the substrate; a trench in the drift layer; a base region contacting a sidewall of the trench; a source region in an upper portion of the base region; a gate electrode in the trench via a gate insulation film; a source electrode on the source region; and a drain electrode on a second side of the substrate. The source region has multi-layered structure including a first layer and a second layer. The first layer as an upper layer contacts the source electrode with ohmic contact. The second layer as a lower layer has an impurity concentration, which is lower than an impurity concentration of the first layer.

Silicon carbide semiconductor device and manufacturing method of the same

A silicon carbide semiconductor device having a MOS structure includes: a substrate; a channel area in the substrate; a first impurity area; a second impurity area; a gate insulating film on the channel area; and a gate on the gate insulating film. The channel area provides an electric current path. The channel area and the gate insulating film have an interface therebetween. The interface includes a dangling bond, which is terminated by a hydrogen atom or a hydroxyl. The interface has a hydrogen concentration equal to or larger than 2.6&#xd7;10cm.

Method for manufacturing silicon carbide semiconductor device having high channel mobility

A silicon carbide semiconductor device includes a substrate, a drift layer located on a first surface of the substrate, a base region located on the drift layer, a source region located on the base region, a trench sandwiched by each of the base region to the drift layer, a channel layer located in the trench, a gate insulating layer located on the channel layer, a gate electrode located on the gate insulating layer, a source electrode electrically coupled with the source region and the base region, a drain electrode located on a second surface of the substrate, and a deep layer located under the base region and extending to a depth deeper than the trench. The deep layer is formed into a lattice pattern.

Silicon carbide semiconductor device including deep layer

A semiconductor device includes: a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; a third semiconductor layer on the second semiconductor layer; a fourth semiconductor layer in a part of the third semiconductor layer; a trench penetrating the fourth semiconductor layer and the third semiconductor layer and reaching the second semiconductor layer; a gate insulation film on an inner wall of the trench; a gate electrode on the gate insulation film in the trench; a first electrode; and a second electrode. The trench includes a bottom with a curved surface having a curvature radius equal to or smaller than 0.5 &#x3bc;m.

Trench gate type semiconductor device

A trench gate type IGBT includes: a first semiconductor layer; a second semiconductor on the first semiconductor layer; a third semiconductor on the second semiconductor layer; trenches for separating the third semiconductor layer into first regions and second regions; a gate insulation film on an inner wall of each trench; a gate electrode on the gate insulation film; a fourth semiconductor layer in a surface portion of each first region and contacting each trench; a first electrode connecting to the first region and the fourth semiconductor layer; and a second electrode connecting to the first semiconductor layer. The first regions and the second regions are alternately arranged. Two second regions are continuously connected together to be integrated into one body.

Growing community of inventors

Chiryu, Japan

Kensaku Yamamoto