Applied Materials, Inc.

Other

Kenny Linh Doan

Bryan Y Pu

Kallol Bera

Hongching Shan

Claes H Bjorkman

Daniel John Hoffman

Paul Brillhart

Ezra Robert Gold

Jong Mun Kim

Xiaoye Zhao

Bruno Geoffrion

Kartik Ramaswamy

Yunsang Kim

Sergio Fukuda Shoji

Haitao Wang

Daisuke Shimizu

Jingbao Liu

Richard Raymond Mett

Mike Welch

Hamid Noorbakhsh

Chunlei Zhang

Anwar Husain

Hongqing Shan

Evans Yip Lee

Jaeyong Cho

Usama Dadu

Jairaj Joseph Payyapilly

Li Ling

Srinivas D Nemani

Michael S Barnes

Christopher Dennis Bencher

Valentin Nikolov Todorow

Yue Guo

Christopher S Ngai

Stephan Wege

Ruiping Wang

Brad L Mays

Michael G Chafin

Wendy H Yeh

Wonseok Lee

Subhash Deshmukh

Mahmoud Dahimene

Judy Wang

Eda Tuncel

Takehiko Komatsu

Kevin Choi

Don Curry

Hong D Nguyen

Claes H Bj&ouml;rkman

Melody Chang

Yuju Huang

Embodiments include an electrostatic chuck assembly having an electrostatic chuck mounted on an insulator. The electrostatic chuck and insulator may be within a chamber volume of a process chamber. In an embodiment, a ground shield surrounds the electrostatic chuck and the insulator, and a gap between the ground shield and the electrostatic chuck provides an environment at risk for electric field emission. A dielectric filler can be placed within the gap to reduce a likelihood of electric field emission. The dielectric filler can have a flexible outer surface that covers or attaches to the electrostatic chuck, or an interface between the electrostatic chuck and the insulator Other embodiments are also described and claimed.

Electrostatic chuck assembly having a dielectric filler

A method, apparatus and system for dechucking a processing object from a surface of an electrostatic chuck (ESC) in a processing chamber can include applying to the ESC for a first time interval, a first dechuck voltage having a substantially equal magnitude and opposite polarity of a chuck voltage chucking the processing object to the surface of the ESC, selecting a second dechuck voltage having an opposite polarity as the first dechuck voltage, linearly sweeping the ESC voltage from the first dechuck voltage to the second dechuck voltage over a second time interval, monitoring the ESC current during the second time interval until a current spike in the ESC current above a threshold is detected, communicating a command to move support pins up to remove the processing object from the ESC surface, and maintaining the second dechuck voltage until the processing object is separated from the surface of the ESC.

Method, apparatus and system for wafer dechucking using dynamic voltage sweeping

Embodiments include a plasma processing method for cleaning polymer byproducts from interior surfaces of the plasma chamber. In an embodiment the plasma process may include processing a workpiece in a plasma processing chamber. Thereafter, the method may include removing the workpiece from the processing chamber. After the workpiece is removed, embodiments may include cleaning the plasma processing chamber with a cleaning process that includes a high pressure cleaning process, a first low pressure cleaning process, and a second low pressure cleaning process, wherein the second low pressure cleaning process includes applying a pulsed bias.

Using bias RF pulsing to effectively clean electrostatic chuck (ESC)

An article having alternating oxide layers and nitride layers is etched by an etch process. The etch process includes providing a first gas comprising CFHin a chamber of an etch reactor, ionizing the CFHcontaining gas to produce a plasma comprising a plurality of ions, and etching the article using the plurality of ions.

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Boron-doped carbon-based hardmask etch processing is described. In an example, a method of patterning a film includes etching a boron-doped amorphous carbon layer with a plasma based on a combination of CH/N/Oand a flourine-rich source such as, but not limited to, CF, SFor CF.

Boron-doped carbon-based hardmask etch processing

Plasma etching of boron-doped carbonaceous mask layers with an etchant gas mixture including CFor CHF, and at least one of COS and CFI. Etchant gas mixtures may further include a carbon-free fluorine source gas, such as SFor NF, and/or an oxidizer, such as O, for higher etch rates. Nitrogen-containing source gases may also be provided in the etchant gas mixture to reduce sidewall bowing in high aspect ratio (HAR) feature etches.

Plasma etch processes for boron-doped carbonaceous mask layers

A method for etching a substrate includes etching at least one first layer of the substrate with a non-uniform substrate temperature and etching at least one second layer of the substrate with uniform substrate temperatures.

Method for etching substrate

A plasma reactor for processing a workpiece such as a semiconductor wafer has a housing defining a process chamber, a workpiece support configured to support a workpiece within the chamber during processing and comprising a plasma bias power electrode. The reactor further includes plural gas sources containing different gas species, plural process gas inlets and an array of valves capable of coupling any of said plural gas sources to any of said plural process gas inlets. The reactor also includes a controller governing said array of valves and is programmed to change the flow rates of gases through said inlets over time. A ceiling plasma source power electrode of the reactor has plural gas injection zones coupled to the respective process gas inlets. In a preferred embodiment, the plural gas sources comprise supplies containing, respectively, fluorocarbon or fluorohydrocarbon species with respectively different ratios of carbon and fluorine chemistries. They further include an oxygen or nitrogen supply and a diluent gas supply. The controller is programmed to produce flow of different process gas species or mixtures thereof through different ones of said plural gas injection zones. The controller is further programmed to change over time the species content of the gases flowing through different ones of said plural gas injection zones.

Plasma reactor apparatus with multiple gas injection zones having time-changing separate configurable gas compositions for each zone

High aspect ratio contact openings are etched while preventing bowing or bending of the etch profile by forming a highly conductive thin film on the side wall of each contact opening. The conductivity of the thin film on the side wall is enhanced by ion bombardment carried out periodically during the etch process.

Method of preventing etch profile bending and bowing in high aspect ratio openings by treating a polymer formed on the opening sidewalls

A plasma etch process etches high aspect ratio openings in a dielectric film on a workpiece in a reactor having a ceiling electrode overlying the workpiece and an electrostatic chuck supporting the workpiece. The process includes injecting a polymerizing etch process gas through an annular zone of gas injection orifices in the ceiling electrode, and evacuating gas from the reactor through a pumping annulus surrounding an edge of the workpiece. The high aspect ratio openings are etched in the dielectric film with etch species derived from the etch process gas while depositing a polymer derived from the etch process gas onto the workpiece, by generating a plasma in the reactor by applying VHF source power and/or HF and/or LF bias power to the electrodes at the ceiling and/or the electrostatic chuck. The process further includes slowing the deposition rate of the polymer, minimizing etch stop and/or increasing the etch rate in a region of the workpiece typically the center by injecting oxygen or nitrogen and/or high-fluorine containing gas through gas injection orifice in the corresponding region of the ceiling electrode, and adjusting the flow rate of the oxygen or nitrogen and/or high-fluorine containing gas through the gas injection orifice to minimize the difference between profiles and etch depths at the workpiece center and the workpiece periphery.

Plasma etch process using polymerizing etch gases across a wafer surface and additional polymer managing or controlling gases in independently fed gas zones with time and spatial modulation of gas content

A plasma etch process for etching high aspect ratio openings in a dielectric film on a workpiece is carried out in a reactor having a ceiling electrode overlying the workpiece and an electrostatic chuck supporting the workpiece. The process includes injecting a first polymerizing etch process gas through a radially inward one of plural concentric gas injection zones in the ceiling electrode and injecting a second polymerizing etch process gas through a radially outward one of the plural concentric gas injection zones in the ceiling electrode, the compositions of the first and second process gases having first and second carbon-to-fluorine ratios that differ from one another. The process further includes evacuating gas from the reactor through a pumping annulus surrounding an edge of the workpiece, and etching the high aspect ratio openings in the dielectric film with etch species derived from the etch process gas while depositing a polymer derived from the etch process gas onto the workpiece, by generating a plasma in the reactor.

Plasma etch process with separately fed carbon-lean and carbon-rich polymerizing etch gases in independent inner and outer gas injection zones

A plasma etch process includes injecting process gases with different compositions of chemical species through different radial gas injection zones of an overhead electrode to establish a desired distribution of chemical species among the plural gas injection zones.

Plasma etch process using polymerizing etch gases with different etch and polymer-deposition rates in different radial gas injection zones with time modulation

Apparatus for plasma etching a layer of material upon a substrate comprising an anode having a first region protruding from a second region, wherein the second region defines a plane and the first region extends from said plane. In one embodiment, at least one solenoid is disposed near the apparatus to magnetize the plasma.

Apparatus for uniformly etching a dielectric layer

A method is described for decreasing the critical dimensions of integrated circuit features in which a first masking layer () is deposited, patterned and opened in the manner of typical feature etching, and a second masking layer () is deposited thereon prior to etching the underlying insulator. The second masking layer is advantageously coated in a substantially conformal manner. Opening the second masking layer while leaving material of the second layer on the sidewalls of the first masking layer as spacers leads to reduction of the feature critical dimension in the underlying insulator. Ashable masking materials, including amorphous carbon and organic materials are removable without CMP, thereby reducing costs. Favorable results are also obtained utilizing more than one masking layer () underlying the topmost masking layer () from which the spacers are formed. Embodiments are also described in which slope etching replaces the addition of a separate spacer layer. Substructures formed in the fabrication process are also described. Spacers are also shown to be favorably employed in making feature-in-feature structures.

Ashable layers for reducing critical dimensions of integrated circuit features

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San Jose, CA, United States of America

Kenny Linh Doan