Adeia Semiconductor Bonding Technologies Inc.

Fry's Metals, Inc.

Alpha Metals, Inc.

Cookson Electronics, Inc.

Kenneth Burton Gilleo

David B Blumel

Gary W Grube

Gaetan L Mathieu

Konstantine N Karavakis

Michael C Corey

Jason Sweis

James McLenaghan

An uncured epoxy adhesive comprising a resin component, a hardener component, and a microencapsulated accelerator component. The microencapsulated accelerator component comprises an infrared absorber, an accelerator and a wall that covers substantially the entire surface of the accelerator. The epoxy adhesive is cured by exposing it to infrared energy. The infrared energy is absorbed by the infrared absorber which disintegrates the wall and allows the accelerator to come into contact with the other adhesive components and initiate the curing polymerization reaction.

Releasable microcapsule and adhesive curing system using the same

Photon-conducting receiving and transmitting media (e.g., optical fibers) are aligned by coupling the receiving medium with a thermokinetic structure, which can include a shape memory alloy. A photon beam is directed from the transmitting medium onto the thermokinetic structure, thereby locally heating the thermokinetic structure. The heated portion of the thermokinetic structure contracts to displace other portions of the structure and the receiving medium, which is coupled therewith, toward the photon beam so as to align the media.

Photon-conducting media alignment using a thermokinetic material

A process for masking an electronic component substrate involving application of a temporary mask material to the substrate to form a removably adhered temporary mask over the surface. Exemplary mask materials include polymer films and aqueous hardenable liquid coatings. An electronic component substrate having a temporary mask for masking the substrate surface from interconnect fill material.

Via interconnect forming process and electronic component product thereof

A method for applying an underfill and edge coating to a flip chip is described. The method includes the steps of adhering a bumped wafer to an expandable carrier substrate, sawing the wafer to form individual chips, stretching the carrier substrate in a bidirectional manner to form channels between each of the individual chips, applying an underfill material to the bumped surfaces of the chips and around the edges of the chips, cutting the underfill material in the channels between the chips and removing the individual, underfill coated chips from the carrier.

Wafer coating method for flip chips

A semiconductor chip package assembly is mounted to contact pads on a die. A compliant interposer layer is disposed between the die and a dielectric substrate wiring layer. The contacts on the die are connected to terminals on the compliant interposer layer by means of a compliant, conductive polymer extending through apertures in the interposer layer. Compliancy in the interposer layer and in the conductive polymer permits relative movement of the terminals on the dielectric substrate wiring layer to the contacts on the die and hence relieves the shear forces caused by differential thermal expansion. The arrangement provides a compact packaged structure similar to that achieved through flip-ship bonding, but with markedly increased resistance to thermal cycling damage. Further, the packaged structure allows the standardization of the packages such that several companies can make competing chips that are packaged such that the resultant packaged structures are roughly the same as far as the end user is concerned.

Compliant semiconductor chip assemblies and methods of making same

The present invention relates to a process for forming a two-stage bump on a flip chip. The process employs an underfill material which can be formed to act as a mask for application of bumps formed from a first composition to the flip chip. A material having a different composition can then be applied to the bumps.

Flip chip having integral mask and underfill providing two-stage bump formation

A flip chip having solder bumps, an integrated underfill, and a separate flux coating, as well as methods for making such a device, is described. The device is characterized in that the underfill material is provided on the chip surface prior to the application of solder bumps, and then treated to form apertures therein which act as a mask for solder bump application. The resulting device is well suited for a simple one-step application to a printed circuit board, thereby simplifying flip chip manufacturing processes which heretofore have required a separate underfilling step.

Flip chip with integrated mask and underfill

A microelectronic element assembly such as a semiconductor chip assembly uses a connection component incorporating a dielectric sheet with electrically conductive elements therein. Each electrically conductive element may include a flexible shell. The flexible shells can be formed to assure reliable engagement with mating contact pads.

Microelectronic component mounting with deformable shell terminals

A flip chip having solder bumps and an integrated flux and underfill, as well as methods for making such a device, is described. The resulting device is well suited for a simple one-step application to a printed circuit board, thereby simplifying flip chip manufacturing processes which heretofore have required separate fluxing and underfilling steps.

Flip chip with integrated flux and underfill

A semiconductor chip package assembly is mounted to contact pads on a die. A compliant interposer layer is disposed between the die and a dielectric substrate wiring layer. The contacts on the die are connected to terminals on the compliant interposer layer by means of a compliant, conductive polymer extending through apertures in the interposer layer. Compliancy in the interposer layer and in the conductive polymer permits relative movement of the terminals on the dielectric substrate wiring layer to the contacts on the die and hence relieves the shear forces caused by differential thermal expansion. The arrangement provides a compact packaged structure similar to that achieved through flip-chip bonding, but with markedly increased resistance to thermal cycling damage. Further, the packaged structure allows the standardization of the packages such that several companies can make competing chips that are packaged such that the resultant packaged structures are roughly the same as far as the end user is concerned.

Ordered Z-axis electroconductive sheet materials are produced by entrapping bodies of fusible, polymeric, electroconductive adhesive at predetermined spaced locations in a sheet-like carrier of fusible, polymeric, dielectric adhesive including a thermoplastic component. The materials are useful for mechanically joining and electrically connecting electronic circuit components.

Methods for producing ordered Z-axis adhesive materials, materials so

Electroconductive resin adhesive particles are incorporated in a dielectric-resin-adhesive-containing carrier to form a Z-axis adhesive. Particles are preferably produced by printing techniques or by in-fluid forming techniques, the latter being particularly suited for the formation of substantially spherical particle shapes. The particles also have use as discrete adhesive members.

Method of making electroconductive adhesive particles for Z-axis

A method for creating an interface between a chip and chip carrier includes spacing the chip a given distance above the chip carrier, and then introducing a liquid in the gap between the chip and carrier. Preferably, the liquid is an elastomer which is hardened into a resilient layer after its introduction into the gap. In another preferred embodiment, the terminals on a chip carrier are planarized or otherwise vertically positioned by deforming the terminals into set vertical locations with a plate, and then hardening a liquid between the chip carrier and chip.

Growing community of inventors

Cranston, RI, United States of America

Kenneth Burton Gilleo