Maxim Integrated Products, Inc.

Ken Liao

Alexander Kalnitsky

Robert F Scheer

Tadanori Yamaguchi

Fanling Hsu Yang

Michael Rowlandson

Geoffrey C Stutzin

Dmitri A Choutov

Thomas W Dobson

The present invention provides a method of forming a super self-aligned bipolar transistor with enhanced electrical characteristics. The power gain and frequency response of the transistor are improved by horizontally etching an area for the base region that is wider than the active emitter and collector regions. By removing polysilicon layers within the device, the base region resistance goes down and unwanted capacitive effects are reduced.

Method of forming a super self-aligned hetero-junction bipolar transistor

A method of forming a shallow-deep trench isolation (SDTI) is provided that includes the steps of forming a pair of deep trenches through a silicon on insulator (SOI) layer without substantially disturbing an underlying buried oxide (BOX) layer. Once the deep trenches are formed, the trenches are filed with suitable electrical isolating materials, such as undoped poly-silicon or dielectric material, and etched back to obtain a substantially planarized top surface. Subsequently, an active nitride layer is deposited on the planarized top surface, and then a pair of shallow trenches are formed. The shallow trenches are formed using a low selectivity etch to uniformly etch a deep trench liner oxide, the SOI layer and the electrical isolating material which have interfaces at non-perpendicular angles with respect to the direction of the etching. Once the shallow and deep trenches are formed, subsequent processing including filling the shallow trench, annealing and chemical-mechanical polishing can be performed.

Method of forming a shallow and deep trench isolation (SDTI) suitable for silicon on insulator (SOI) substrates

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Beaverton, OR, United States of America

Ken Liao