Micron Technology Incorporated

Kelvin Tan Aik Boo

Hong Wan Ng

Chin Hui Chong

Seng Kim Ye

Hem P Takiar

Ling Pan

Sook Har Leong

Wen Wei Lum

An apparatus includes a primary layer of a substrate. The apparatus includes a secondary layer of the substrate having a first open area that extends through the secondary layer to an inner layer of the substrate. The apparatus includes the inner layer of the substrate that is positioned between the primary layer and the secondary layer. The inner layer includes first component bond pads that are disposed on the inner layer and that are exposed via the first open area of the secondary layer.

Surface mount device bonded to an inner layer of a multi-layer substrate

A microelectronic device package includes a microelectronic device, a masking material defined (MMD) contact, and a non-masking material defined (NMMD) contact. The microelectronic device is supported on, and electrically connected to, one of a package substrate and a redistribution layer. The MMD contact is located in a first region of the one of the package substrate and the redistribution layer and facilitates a first electrical connection between the microelectronic device and the one of the package substrate and the redistribution layer. The NMMD contact is located in a second, different region of the one of the package substrate and the redistribution layer and facilitates a second electrical connection between the microelectronic device and the one of the package substrate and the redistribution layer. Related methods and systems are also disclosed.

Microelectronic device packages and related methods and systems

An apparatus includes a substrate for mounting an integrated circuit. The substrate includes a primary layer including a first surface that is a first external surface of the substrate. The substrate includes an inner layer that is located below the primary layer and including a second surface. A portion of the second surface of the inner layer is exposed via an open area associated with the primary layer. The inner layer includes a first multiple of wire bond pads that are exposed via the open area associated with the primary layer.

Integrated circuit wire bonded to a multi-layer substrate having an open area that exposes wire bond pads at a surface of the inner layer

An apparatus includes a primary layer of a substrate that includes an open area that extends through the primary layer to an inner layer of the substrate. The apparatus includes a secondary layer of the substrate. The apparatus also includes the inner layer of the substrate that is positioned between the primary layer and the secondary layer. The inner layer includes component bond pads that are disposed on the inner layer and that are exposed via the open area of the primary layer.

A semiconductor device includes a rigid flex circuit that has a first rigid region and a second rigid region that are electrically connected by a flexible portion. A first die is mounted to a first side of the first rigid region. A second die is mounted to a second side of the second rigid region. The first and second sides are on opposite sides of the rigid flex circuit. The flexible portion is bent to hold the first and second rigid regions in generally vertical alignment with each other.

Semiconductor assemblies with systems and methods for managing high die stack structures

Semiconductor devices and associated systems and methods are disclosed herein. In some embodiments the semiconductor devices include a package substrate, a controller die carried by the package substrate and a spacer carried by the package substrate spaced apart from the controller die. A thermally conductive material can be carried by an upper surface of the controller die and establish a thermal path extending from the upper surface of the controller die to the package substrate. The thermal path can reach the package substrate at a position horizontally between the controller die and the spacer. The semiconductor device can also include one or more dies at least partially carried by the spacer and at least partially above the controller die and the thermally conductive material. Each of the one or more dies is thermally insulated from the thermally conductive material, for example by a thermal adhesive layer between the two.

Thermal distribution network for semiconductor devices and associated systems and methods

Semiconductor devices having multiple substrates and die stacks, and associated systems and methods, are disclosed herein. In some embodiments, a semiconductor device includes a package substrate, and a first die stack mounted on the package substrate and including a plurality of first memory dies. The device can include a substrate mounted on the first die stack, the substrate including a plurality of routing elements. The device can also include a second die stack mounted on the substrate, the second die stack including a plurality of second memory dies. The device can further include a controller die mounted on the substrate. The controller die can be configured to communicate with the second die stack via the routing elements of the substrate. The device can include a mold material encapsulating the first die stack, the second die stack, the substrate, and the controller die.

Semiconductor devices with multiple substrates and die stacks

Substrates for semiconductor packages, including hybrid substrates for decoupling capacitors, and associated devices, systems, and methods are disclosed herein. In one embodiment, a substrate includes a first pair and a second pair of electrical contacts on a first surface of the substrate. The first pair of electrical contacts can be configured to receive a first surface-mount capacitor, and the second pair of electrical contacts can be configured to receive a second surface-mount capacitor. The first pair of electrical contacts can be spaced apart by a first space, and the second pair of electrical contacts can be spaced apart by a second space. The first and second spaces can correspond to first and second distances between electrical contacts of the first and second surface-mount capacitors.

Substrates for semiconductor packages, including hybrid substrates for decoupling capacitors, and associated devices, systems, and methods

An apparatus includes an integrated circuit and a substrate coupled to the integrated circuit. The substrate includes a primary layer having a first surface that is a first external surface of the substrate. The primary layer includes an open area that extends through the primary layer to an inner layer of the substrate. The substrate includes a secondary layer. The inner layer is located between the primary layer and the secondary layer. The inner layer includes a third surface that is orientated approximately parallel to the first surface of the primary layer. A portion of the third surface of the inner layer is exposed via the open area of the primary layer. A first plurality of wire bond pads are disposed on the portion of the third surface of the inner layer that is exposed via the open area of primary layer.

Growing community of inventors

Georgetown, Malaysia

Kelvin Tan Aik Boo