Hitachi, Ltd.

Hitachi Vlsi Engineering Corp.

Other

Renesas Technology Corp.

Hitachi Ulsi Engineering Corp.

Keisuke Funatsu

Hideo Aoki

Isamu Asano

Yoshinao Kawasaki

Tsuyoshi Tamaru

Masakazu Sagawa

Nobuo Owada

Osamu Tsuchiya

Toru Kaga

Fumio Ootsuka

Kazuyoshi Torii

Hiromichi Enami

Mitsuaki Horiuchi

Jun Sugiura

Osamu Kasahara

Hidetsugu Ogishi

Makoto Ogasawara

Masatoshi Tsuneoka

Takayoshi Kogano

Seiichirou Shirai

Atsushi Wakahara

Hiroyuki Akimori

Sinichi Suzuki

Ken Tsugane

Nobuhiro Otsuka

Yoshihiro Ikeda

Tomotsugu Shimmyo

Tunehiko Tubone

Junji Noguchi

Toshinori Imai

Sukeyoshi Tsunekawa

Naohumi Ohashi

Kenichi Kawasumi

Kazusato Hara

Takeshi Kimura

Akio Inada

Masaro Kaku

Kootaroo Koizumi

Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in those active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions, comprising: the step of for forming a first mask by a non-oxidizable mask and an etching mask sequentially over the principal surface of the active regions of the substrate; the step of forming a second mask on and in self-alignment with the side walls of the first mask by a non-oxidizable mask thinner than the non-oxidizable mask of the first mask and an etching mask respectively; the step of etching the principal surface of the inactive regions of the substrate by using the first mask and the second mask; the step of forming the element separating insulating film over the principal surface of the inactive regions of the substrate by an oxidization using the first mask and the second mask; and the step of forming the channel stopper regions over the principal surface portions below the element separating insulating film of the substrate by introducing an impurity into all the surface portions including the active regions and the inactive regions of the substrate after the first mask and the second mask have been removed.

Semiconductor integrated circuit device, process for fabricating the same, and apparatus for fabricating the same

Over a plug, a stopper insulating film made of an organic film is formed, followed by successive formation of an insulating film and a hard mask. In the presence of a patterned resist film, the hard mask is dry etched, whereby an interconnection groove pattern is transferred thereto. By ashing with oxygen plasma, the resist film is removed to form the interconnection-groove-pattern-transferred hard mask. At this time, the organic film constituting the stopper insulating film has been covered with the insulating film. Then, the insulating film, stopper insulating film and hard mask are removed to form the groove pattern of interconnection. Hydrogen annealing may be conducted after formation of the plug, or the stopper insulating film may be formed over the plug via an adhesion layer.

Method of manufacturing a semiconductor device and a semiconductor device

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING A FIRST WIRING STRIP EXPOSED THROUGH A CONNECTING HOLE, A TRANSITION-METAL FILM IN THE CONNECTING HOLE AND AN ALUMINUM WIRING STRIP THEREOVER, AND A TRANSITION-METAL NITRIDE FILM BETWEEN THE ALUMINUM WIRING STRIP AND THE TRANSITION-METAL FILM

Herein disclosed is a semiconductor integrated circuit device fabricating process for forming MISFETs over the principal surface in active regions of a substrate, which are surrounded by inactive regions formed of an element separating insulating film and channel stopper regions. The disclosed process includes forming insulating films over wiring lines including uppermost wiring lines, the uppermost wiring lines having gaps between adjacent uppermost wiring lines. The insulating films include forming a silicon oxide film over the wiring lines and in the gaps between adjacent uppermost wiring lines, and forming a silicon nitride film over the silicon oxide film, the silicon nitride film being formed by plasma chemical vapor deposition. The silicon oxide film is formed to have a thickness of at least one-half of the gap between adjacent uppermost wiring lines, with the silicon nitride film being thicker than the silicon oxide film.

Semiconductor integrated circuit device, process for fabricating the

Method of forming teos oxide and silicon nitride passivation layer on

Semiconductor integrated circuit device process for fabricating the same

An organic film removing method uses an organic film removing apparatus comprising a processing vessel defining a processing chamber, a wafer support for supporting a semiconductor wafer within the processing chamber, and a mixed gas supplier for supplying a mixed gas consisting of an alcohol or alcohols, and ozone gas or an ozone-containing gas into the processing chamber so that the mixed gas acts on an organic film pattern on the surface of the supported semiconductor wafer. The apparatus continuously supplies the mixed gas into the processing chamber at least in a period between a time immediately before mounting the semiconductor wafer on the wafer support and a time when the organic film is removed completely; conveys the semiconductor wafer into the processing chamber; supports the semiconductor wafer within the processing chamber; and heats the patterned organic film on the surface of the supported semiconductor wafer at a temperature in a range below a temperature at which substantial defects will be formed in the elements of a semiconductor device to be formed on the semiconductor wafer. This method is capable of ashing the organic film at an ashing rate equal to or higher than an ashing rate at which a known organic film removing method employing a steam-containing ozone gas ashes the organic film, and of reducing water marks as compared with the known method employing the steam-containing ozone gas.

Method of and apparatus for removing an organic film

An apparatus and method for surface treatment of a substance to be processed, which are capable of decreasing the number of foreign matters holding on the reverse side of the substance more than prior art like apparatus and method without largely decreasing a surface treating speed as compared with that of the prior art, by supplying ozone gas to the surface of the substance mounted on a supporting base. The supporting base has a heating part and a supporting part. There is provided a supporting material on the surface of the supporting part for partly supporting one side of the substance to be processed so that a required amount of gap may be formed between the substance to be processed and the supporting part. In the heating part is built a heater. And for a member constituting the supporting part is used a material having greater emissivity than a member constituting the heating part.

Apparatus and method for surface treatment

Growing community of inventors

Ohme, Japan

Keisuke Funatsu