Shinko Electric Industries Co., Ltd.

Asahi Kasei Microdevices Corporation

Shinko Electric Electric Industries Co., Ltd.

Kei Murayama

Mitsutoshi Higashi

Masahiro Sunohara

Akinori Shiraishi

Yuichi Taguchi

Hideaki Sakaguchi

Naoyuki Koizumi

Toshinori Koyama

Mitsuhiro Aizawa

Hiroko Koike

Kazutaka Kobayashi

Naohiro Mashino

Takashi Kurihara

Hiroyuki Kato

Shigeru Mizuno

Syoji Watanabe

Kiyoshi Oi

Tsuyoshi Kobayashi

Shota Miki

Takaharu Yamano

Naoki Kobayashi

Shigeaki Suganuma

Yukiharu Takeuchi

Yoshihiro Ihara

Hajime Iizuka

Kenichi Mori

Ryuichi Matsuki

Masakuni Kitajima

Toshio Gomyo

Shinji Nakazawa

Koji Hara

Hiroyuki Miyajima

Katsunori Yamagishi

Koji Nagai

Mitsutoshi Higashii

Shinji Nakajima

Koyuki Kawakami

Amane Kaneko

Miki Suzuki

A semiconductor device includes a lower substrate, a semiconductor element mounted on an upper surface of the lower substrate, an upper substrate disposed on an upper surface of the semiconductor element, an encapsulation resin disposed between the lower substrate and the upper substrate and encapsulating the semiconductor element, a wiring layer disposed on an upper surface of the upper substrate, and a covering resin formed from a material having a coefficient of thermal expansion similar to a coefficient of thermal expansion of the encapsulation resin. The covering resin is disposed on the upper surface of the upper substrate and covers a side surface of the wiring layer.

Semiconductor device

A composite wiring substrate includes a first wiring substrate including a first connection terminal, a second wiring substrate including a second connection terminal facing the first connection terminal, and a joint material joining the first connection terminal and the second connection terminal. The first outline of the first connection terminal is inside the second outline of the second connection terminal in a plan view. The joint material includes a first portion formed of an intermetallic alloy of copper and tin, and contacting each of the first connection terminal and the second connection terminal, and a second portion formed of an alloy of tin and bismuth, and including a portion between the first outline and the second outline in the plan view. The second portion contains the bismuth at a higher concentration than in the eutectic composition of a tin-bismuth alloy, and is separated from the second connection terminal.

Composite wiring substrate and semiconductor device

A wiring substrate includes: a wiring structure that includes a wiring layer and an insulating layer laminated; a plurality of first posts that are formed along a periphery of a predetermined area on a surface of the wiring structure, and that protrude out from the surface of the wiring structure; and a second post that is connected to the wiring layer at a position surrounded by the first posts, and that protrudes out from the surface of the wiring structure. The first posts are formed such that a post arranged at a central portion of a side constituting the periphery of the predetermined area is lower in height from the surface of the wiring structure than posts arranged at both ends of the side.

Wiring substrate, stacked wiring substrate, and manufacturing method of wiring substrate

A semiconductor device includes an insulative substrate, a wiring pattern, a bonding portion, and a semiconductor element. The wiring pattern is formed on an upper surface of the insulative substrate. The bonding portion is formed on an upper surface of the wiring pattern. The semiconductor element includes an electrode pad connected to an upper surface of the bonding portion. The bonding portion includes first sintered layers distributed in the bonding portion and a second sintered layer having a density differing from each of the first sintered layers and surrounding the first sintered layer.

A conductive ball includes a copper ball, a nickel layer formed with being patterned on an outer surface of the copper ball, and a tin-based solder covering each outer surface of the copper ball and the nickel layer.

Conductive ball and electronic device

A conductive ball includes a copper ball, a nickel layer covering an outer surface of the copper ball, a copper layer covering an outer surface of the nickel layer, and a tin-based solder covering an outer surface of the copper layer. A copper weight of the copper layer relative to a summed weight of the tin-based solder and the copper layer is 0.7 wt % to 3 wt %.

Conductive ball having a tin-based solder covering an outer surface of the copper ball

A semiconductor device includes a wiring substrate, a semiconductor element mounted on the wiring substrate, and a heat dissipation component arranged on the wiring substrate. The heat dissipation component includes a cavity that accommodates the semiconductor element and includes an inner surface opposing the wiring substrate. The semiconductor element is located between the inner surface of the cavity and the wiring substrate. A heat conductor is bonded to the semiconductor element and to the inner surface of the cavity. The heat conductor includes linear heat conductive matters arranged between the semiconductor element and the heat dissipation component. A first alloy layer bonded to the semiconductor element covers lower ends of the heat conductive matters. The heat dissipation component includes a through hole extending through the heat dissipation component toward the heat conductor from a location outside of the heat conductor in a plan view.

Semiconductor device, heat conductor, and method for manufacturing semiconductor device

A wiring substrate includes a connection pad formed in the outermost wiring layer, a dummy pad formed in the outermost wiring layer, and a dummy wiring portion formed in the outermost wiring layer, the dummy wiring portion connecting the connection pad and the dummy pad. The maximum width of each of the connection pad and the dummy pad is set to be larger than the width of the dummy wiring portion. A bump of an electronic component is flip-chip connected to a connection pad through a resin-containing solder.

Wiring substrate and electronic component device

There is provided an interposer for cooling an electronic component. The interposer includes: a substrate body having a hollow cooling channel therein, wherein a cooling medium flows through the cooling channel, the cooling channel including: a plurality of main cooling channels extending in a certain direction and separated from each other; an inflow channel which is communicated with one end of the respective main cooling channels; and an outflow channel which is communicated with the other end of the respective main cooling channels, and a plurality of through electrode groups each comprising a plurality of through electrodes arranged in a line. Each of the though electrodes is formed through the substrate body to reach the first and second surfaces of the substrate body. The respective through electrode groups are partitioned by at least corresponding one of the main cooling channels.

Interposer and semiconductor device including the same

An interposer includes a wiring member including a first inorganic substrate, a reinforcement member including a second inorganic substrate, and an adhesive part interposed between the wiring member and the reinforcement member. Each of the first and second inorganic substrates includes first and second surfaces. Multiple inorganic insulating layers formed on the first surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in a vertical direction with the adhesive part centered therebetween. An inorganic insulating layer and an organic insulating layer formed on the second surface of each of the first and second inorganic substrates have the same layer configuration and are arranged symmetrically in the vertical direction with the adhesive part. An organic insulating layer formed on the second surface of each of the first and second inorganic substrates is an outermost insulating layer.

Interposer and electronic component package

An electronic device includes: a housing having a concave portion in the first surface of the housing; a lid made of a semiconductor material containing an impurity material; a first metal film formed in a metal film formation region on the first surface of the housing, wherein the metal film formation region is defined as a region surrounding the concave portion on the first surface of the housing; a second metal film formed on the first surface of the lid to overlap with the metal film formation region in a top view of the electronic device; a third metal film formed on the second surface of the lid to overlap with the metal film formation region in the top view; and an electronic component disposed in the concave portion. The lid is bonded onto the housing via the first and second metal films to cover the electronic component.

Electronic device

A semiconductor device is provided with a wiring substrate including a connection pad, a joining member joined with the connection pad, and a semiconductor chip including a connection terminal electrically connected to the connection pad via the joining member. The joining member consists of a first intermetallic compound layer formed at a boundary between the connection pad and the joining member, a second intermetallic compound layer formed at a boundary between the connection terminal and the joining member, a third intermetallic compound layer composed of an intermetallic compound of CuSnor (Cu,Ni)Snand formed between the first intermetallic compound layer and the second intermetallic compound layer, and discrete metal grains, each being composed of a simple substance of Bi, in the third intermetallic compound layer. Surfaces of each of the metal grains are completely covered by the third intermetallic compound layer so that the metal grains do not form a layer.

Solder bump joining structure with low resistance joining member

A connection structure includes a column electrode; a first connecting portion connected to one end of the column electrode; and a second connecting portion connected to another end of the column electrode via solder, wherein a height of the column electrode is a width of the first connecting portion or greater.

Connection structure, wiring substrate unit, electronic circuit part unit, and electronic apparatus

A stacked semiconductor device includes a unit component including a wiring portion formed by electrically connecting a die pad of and a lead of a lead frame, and a semiconductor package whose connection terminal is connected to the lead, wherein the unit component is stacked, and the leads located to upper and lower sides are connected mutually via an electrode.

Stacked semiconductor device and method of manufacturing the same

There is provided a semiconductor device. The semiconductor device includes: a silicon substrate; a copper post connected to one surface of the silicon substrate; a semiconductor element having a linear expansion coefficient different from that of the silicon substrate; a metal layer provided between the semiconductor element and the silicon substrate to cover the copper post; a first alloy layer provided between the copper post and the semiconductor element, wherein the first alloy layer includes alloy of gold and a metal of the metal layer; and a second alloy layer provided between the metal layer and the semiconductor element, wherein the second alloy layer includes alloy of gold and the metal of the metal layer.

Growing community of inventors

Nagano, Japan

Kei Murayama