Fuji Electric Co., Ltd.

Fuji Electric Device Technology Co., Ltd.

Fuji Electric Systems Co. Ltd.

Octec, Inc.

Kazuo Shimoyama

Haruo Nakazawa

Manabu Takei

Hiroki Wakimoto

Mutsumi Kitamura

Tomoyuki Yamazaki

Mitsuaki Kirisawa

Katsuya Okumura

Hongfei Lu

Yasuhiko Tsukamoto

On the top surface of a thin semiconductor wafer, top surface structures forming a semiconductor chip are formed. The top surface of the wafer is affixed to a supporting substrate with a double-sided adhesive tape. Then, from the bottom surface of the thin semiconductor wafer, a trench, which becomes a scribing line, is formed by wet anisotropic etching so that side walls of the trench are exposed. On the side walls of the trench with the crystal face exposed, an isolation layer with a conductivity type different from that of the semiconductor wafer for holding a reverse breakdown voltage is formed simultaneously with a collector region of the bottom surface diffused layer by ion implantation, followed by annealing with laser irradiation. The side walls form a substantially V-shaped or trapezoidal-shaped cross section, with an angle of the side wall relative to the supporting substrate being 30-70&#xb0;. The double-sided adhesive tape is then removed from the top surface to produce semiconductor chips. With such a manufacturing method, a reverse-blocking semiconductor device having high reliability can be formed.

Semiconductor device

Semiconductor device and manufacturing method thereof

A semiconductor device is disclosed which includes active section, edge termination sectionhaving a voltage blocking structure and disposed around active section, and separation sectionhaving a device separation structure and disposed around edge termination section. A surface device structure is formed on the first major surface of active section, trenchis formed in separation sectionfrom the second major surface side, and p-type separation regionis formed on the side wall of trenchsuch that p-type separation regionis in contact with p-type channel stopper regionformed in the surface portion on the first major surface side and p-type collector layerformed in the surface portion on the second major surface side. The semiconductor device and the method for manufacturing the semiconductor device according to the invention facilitate preventing the reverse blocking voltage from decreasing and shorten the manufacturing time of the semiconductor device.

Semiconductor device and the method for manufacturing the same

Cutting work is performed on an n-semiconductor substrate () with an inverted trapezoid-shaped dicing blade to form grooves to be a second side walls (). Bottom portions of the grooves are contacted with a p-diffusion layer () which is formed on a first principal plane () (front face) of the n-semiconductor substrate (), so that the p-diffusion layer () is not cut. Then in the second side walls (), a p-isolation layer () connected to a p-collector layer () and the p-diffusion layer () is formed. Since the p-diffusion layer () is not cut, a glass support substrate for supporting a wafer, and expensive adhesive, are not required, and therefore the p-isolation layer () can be formed at low cost.

Semiconductor device manufacturing method thereof

A thin semiconductor wafer, on which a top surface structure and a bottom surface structure that form a semiconductor chip are formed, is affixed to a supporting substrate by a double-sided adhesive tape. Then, on the thin semiconductor wafer, a trench to become a scribing line is formed by wet anisotropic etching with a crystal face exposed so as to form a side wall of the trench. On the side wall of the trench with the crystal face thus exposed, an isolation layer for holding a reverse breakdown voltage is formed by ion implantation and low temperature annealing or laser annealing so as to be extended to the top surface side while being in contact with a p collector region as a bottom surface diffused layer. Then, laser dicing is carried out to neatly dice a collector electrode, formed on the p collector region, together with the p collector region, without presenting any excessive portions and any insufficient portions under the isolation layer. Thereafter, the double-sided adhesive tape is removed from the collector electrode to produce semiconductor chips. A highly reliable reverse-blocking semiconductor device can thus be formed at a low cost.

The method for manufacturing a semiconductor device according to the invention includes forming a thick silicon oxide film uniformly in a trench. Argon ions or the like implanted obliquely into the trench to form an ion implanted damaged region selectively in the portion of the silicon oxide film on the trench sidewall utilizing the shadowing effects of the oblique ion implantation. The silicon oxide film is wet etched to selectively remove the silicon oxide film in the ion implanted damaged region utilizing the etching rate difference, wherein the etching rate is faster in the damaged region than in the undamaged region. As a result, a thick residual oxide film is formed on the bottom and the lower sidewall portion of the trenchwithout causing any bird's beak.

Method for manufacturing semiconductor device

A method for stably activating pn-successive layers in a semiconductor element in a short time is disclosed. Pulsed beams, each of which has a pulse shape that is approximately rectangular, are projected from respective laser irradiation devices and successively combined into a pulsed beam equivalent to one pulse, with which the doped layer region is irradiated. By successively projecting the pulsed beams onto the doped layer region in this way, an effect is obtained which is the same as that of irradiating the doped layer region with a single pulsed beam having a long full-width at half maximum. A high activation ratio from a shallow region to a deep region of the doped layer region is enabled. This can stably activate the semiconductor element having the pn-successive layers as the doped layer region in a short time, making possible the manufacture of semiconductor elements having superior device characteristics.

Growing community of inventors

Nagano, Japan

Kazuo Shimoyama