Fujitsu Corporation

Kazunori Imaoka

Takao Miura

Takeshi Matsutani

Noriaki Sato

Kiyomasa Kamei

Takao Hiraguchi

Shouji Usui

Taketoshi Inagaki

Fumitoshi Sugimoto

Yoichi Fujisawa

A semiconductor device includes a semiconductor layer which has a first surface, and a second surface which is comparatively lower than the first surface. The semiconductor device also has a first material layer formed over the second surface, which includes a first inorganic material which has a hardness exceeding that of the semiconductor layer. The semiconductor device also includes a second material layer which has a hardness less than that of the first material layer, and which is formed in a gap between a sidewall of the first material layer and a sidewall between the first and second surfaces. The first surface of the semiconductor layer is formed by lapping until the first surface of the semiconductor layer is impeded by the first material layer so that the first surface of the semiconductor layer is substantially flush with a top surface of the first material layer.

Semiconductor device having SOI substrate and fabrication method thereof

In wafer processes, after at least one layer which constitutes a structural member of a functional semiconductor element is formed on a semiconductor wafer, a brittle, excessive deposition on an edge of the semiconductor wafer is removed by grinding or etching of the wafer edge until the underlying wafer is exposed. The removal of the excessive deposition on the wafer edge reduces dust generation caused from crack and peel-off of the excessive deposition on the wafer edge, even if the wafer edge contacts a jig, and the like. Thus, the reduction in dust generation improves production yields of highly integrated semiconductor devices.

Method of fabricating semiconductor devices using an intermediate

A semiconductor device includes a first substrate made of a semiconductor, a first insulator layer which is formed on the first substrate, second substrate made of a semiconductor and formed on the first insulator layer, a trench which extends from a top surface of the second substrate to at least a part of the first insulator layer, and a second insulator layer which substantially defines a side wall of the trench.

Semiconductor device having silicon-on-insulator structure

A metal-oxide-semiconductor device having a semiconductor-on-insulator structure comprises an insulator substrate; a single crystal semiconductor substrate provided on the insulator substrate, the single crystal semiconductor substrate and the insulator substrate forming a part of the semiconductor-on-insulator structure; source and drain regions doped to a first conduction type and defined in the single crystal semiconductor substrate; a channel region defined in the single crystal semiconductor substrate so as to be interposed between the source and drain regions, the channel region being doped to a second conduction type opposite to the first conduction type with a first impurity concentration level; a gate insulator film provided on the single crystal semiconductor substrate in correspondence to the channel region; and a gate electrode provided on the gate insulator film in correspondence to the channel region with a predetermined gate length; wherein the channel region is defined by a back channel elimination region having an increased impurity concentration level exceeding the first impurity concentration level such that the back channel elimination region is located adjacent to the insulator substrate for eliminating the back channel effect, the back channel elimination region being provided under the gate electrode in a manner such that the back channel elimination region is separated from the source and the drain regions by a region having a smaller impurity concentration level.

Method of fabricating a metal-oxide-semiconductor device having a

A method of producing a semiconductor-on-insulator structure generates a first fixed charge in an insulator layer of a base substrate. An active substrate which is made of a semiconductor is bonded on the insulator layer of the base substrate to thereby generate a second fixed charge at an interface of the insulator layer and the active substrate. The first and second fixed charges have mutually opposite polarities. A portion of the active substrate is removed to form the active substrate to an arbitrary thickness.

Method of producing semiconductor-on-insulator structure by besol

A method for producing a semiconductor device on a semiconductor layer provided on an insulator layer comprises the steps of providing an opening on the semiconductor layer to expose a top surface of the insulator layer, depositing a first material layer that has a hardness exceeding the hardness of the semiconductor layer on the semiconductor layer including the exposed top surface, and patterning the first material layer such that a patterned region of the first inorganic material is left in the opening with a gap separating the patterned region from the side wall of the semiconductor layer. The method also comprises the steps of depositing a second material layer of a second inorganic material having a hardness substantially equal to the hardness of the semiconductor layer such that the second material layer covers the semiconductor layer including the opening wherein the patterned region of the first inorganic material is formed, said second material layer being deposited such that the second material layer covers the side wall of the opening and fills the gap between the side wall of the patterned region and the side wall of the opening, and lapping a top surface of the semiconductor layer that is covered by the second material layer, starting from a top surface of the second material layer and proceeding toward the insulator layer until a top surface of the patterned region of the first inorganic material is exposed.

Semiconductor device having a SOI substrate and fabrication method

A semiconductor device having a trench isolation structure comprises a substrate, an active layer formed on the substrate, a trench which penetrates the active layer and reaches a portion of the substrate, and an insulator layer formed within the trench. The active layer has a region in which elements of the semiconductor device are formed, and the insulator layer has charges trapped in at least a predetermined portion thereof in a vicinity of the second region. This predetermined portion of the insulator layer has a depth which is greater than a depth of the region of the active layer.

Semiconductor device having trench isolation

The present invention relates to a semiconductor device e.g., a CMOS, comprising a denuded region and a bulk-defect region, as well as a process for producing, e.g., CMOS. In a conventional CMOS, the distance (dp) between the bulk-defect region and p.sup.+ -type source or drain region (dp) is greater than the distance (dn) between the bulk-defect region and the p well (dn). As a result, a leakage current can be generated in the PN junction. In order to eliminate the problems caused due to dp&gt;dn, the present invention forms in a semiconductor substrate a bulk-defect region having a depth which is nonuniform in accordance with the nonuniform depth of the semiconductor elements.

Process for producing a semiconductor device with a bulk-defect region

A BIC memory cell device comprises a first insulating layer covering a MOS structure, a first penetrating opening in the first insulating layer in correspondence to a drain region and defined by an inclined first side wall which defines the diameter of the first opening such that the diameter increases towards a top surface of the first insulating layer, a second penetrating opening in the first insulating layer in correspondence to a source region and defined by a second side wall having a straight vertical cross section, a third penetrating opening in the first insulating layer in correspondence to a gate electrode and defined by a third side wall having a straight vertical cross section, a second insulating layer provided on the first insulating layer in correspondence to the drain region, a first wiring electrode deposited such that the second insulating layer is sandwiched between the first wiring electrode and the drain region, and second and third wiring electrodes contacting with the source region and the gate electrode.

Method of making a BIC memory cell having contact openings with straight

Semiconductor device having semiconductor-on-insulator structure

In a direct bonded SOI substrate where the SiO.sub.2 films OA, OB are respectively provided on the single surfaces of the silicon substrates A, B, at least any one of SiO.sub.2 films OA, OB has thickness of 1 .mu.m or more. These SiO.sub.2 films OA, OB are bonded and moreover the one silicon substrate B of such a bonded substrate is ground to thickness of about 1 .mu.m. A semiconductor device having a trench structure wherein the trench formed on the silicon substrate B passes through the interface between the SiO.sub.2 film OB and the SiO.sub.2 film OA. The bottom of such a trench is located within the SiO.sub.2 film OA and the bottom of the polycrystalline silicon conductive film within the trench is located within the SiO.sub.2 film OA rather than the interface between the silicon substrate B and SiO.sub.2 film OB.

Semiconductor device using SOI substrate

The present invention relates to semiconductor device, a e.g., a CMOS, comprising a denuded region and a bulk-defect region, as well as the process for producing, e.g., a CMOS. In a conventional CMOS, the distance (dp) between the bulk-defect region and P.sup.+ -type source of drain region--(dp)--is greater than the distance (dn) between the bulk--defect--region and the P well--(dn)--. As a result, a leakage current can be generated in the PN junction. In order to eliminate the problems caused due to dp&gt;dn, the present invention forms in a--semiconductor-substrate a bulk-defect region having a depth which is nonuniform in accordance with the nonuniform depth of the semiconductor elements.

Semiconductor device and a process for producing a semiconductor device

A semiconductor device includes trench capacitors formed in a semiconductor substrate, a trench provided therebetween for isolating the trench capacitors, and a trench capacitor formed in a side wall of the trench for isolating the trench capacitors.

Semiconductor device with improved isolation between trench capacitors

A semiconductor device having a conductor line free of cracks is produced by forming an insulating layer on a semiconductor substrate, opening a contact hole in the insulating layer, forming a contact electrode comprising a high-melting point metal or a silicide of a high-melting point in the contact hole, filling a gap between the contact electrode and the side of the contact hole with polycrystalline silicon to form a substantially level surface, forming a conductor line on the level surface, and alloying the polycrystalline silicon with the conductor line and/or the contact electrode by heating.

Process for forming planar wiring using polysilicon to fill gaps

A variety of methods are applicable to production of semiconductor devices in which the active layer is produced in a denuded zone which is thin and free of defects. This denuded zone in combination with a high concentration of crystalline defects contained in a deep layer of the semiconductor device, allows the semiconductor device to enjoy the function of the intrinsic gettering effect. A variety of improvements, including a decrease in the overall production time, removal of limitations due to the oxygen concentration of a wafer, etc. is realized by introducing an idea that the annealing temperature is increased and/or decreased gradually at a predetermined rate. A variety of such improved annealing processes being combined with each other and/or to a variety of conventional annealing processes, aiming at a higher magnitude of the intrinsic gettering effect. This improvement is further modified to be combined with epitaxy to diversify the uses of a denuded zone.

Growing community of inventors

Komae, Japan

Kazunori Imaoka