Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Kazunari Michii

Kazuyuki Misumi

Shinji Semba

Naoyuki Shinonaga

Tetsuya Ueda

Jun Shibata

Tetsuya Matsuura

Naoto Ueda

Yasushi Kasatani

Tatsuhiko Akiyama

Masataka Takehara

Yoshihiro Hirata

Hiroshi Seki

Haruo Shimamoto

Kiyoaki Tsumura

Hiroshi Horibe

Tatsuya Hirai

Hajime Maeda

Seiji Takemura

Hideki Ishii

Moriyoshi Nakashima

Hitoshi Fujimoto

Yasuhito Suzuki

Kou Shimomura

Yasuki Takata

Manabu Horita

Osamu Nakagawa

Takashi Miyamoto

Koichi Nakagawa

Ken Yamamura

Hitoshi Sasaki

Yutaka Koyama

A plurality of semiconductor chips is mounted on a surface of a substrate to be used for manufacturing semiconductor devices. The semiconductor chips are collectively sealed with resin, thereby forming resin-sealed sections. A plurality of solder balls are formed on the back surface of the substrate such that an interval A between the corresponding solder balls of adjacent semiconductor chips becomes 'n' times ('n' is an integer greater than 1) an interval B between the solder balls on the semiconductor chip. After the semiconductor chips have been subjected to an electrical test, the resin-sealed sections and the substrate are sliced, thus breaking the semiconductor chips into pieces.

Semiconductor device with terminals, and method of manufacturing the same

A plurality of semiconductor chips is mounted on a surface of a substrate to be used for manufacturing semiconductor devices. The semiconductor chips are collectively sealed with resin, thereby forming resin-sealed sections. A plurality of solder balls are formed on the back surface of the substrate such that an interval A between the closest solder balls of adjacent semiconductor chips becomes 'n' times ('n' is an integer greater than 1) an interval B between the solder balls on the semiconductor chip. After the semiconductor chips have been subjected to an electrical test, the resin-sealed sections and the substrate are sliced, thus breaking the semiconductor chips into pieces.

A semiconductor device includes a substrate; an external electrode terminal for electrically connecting to an external electrode; a first semiconductor chip provided above the substrate, having a plurality of electrode pads disposed on a major surface thereof; a second semiconductor chip provided above the first semiconductor chip, having a plurality of electrode pads disposed on a major surface thereof; and connection lines for connecting the electrode pads to the external electrode. A part of the major surface of the first semiconductor chip faces a part of the surface opposite to the major surface of the second semiconductor chip; and the first semiconductor chip is shifted from the second semiconductor chip, so that the second semiconductor chip does not overlap the electrode pads of the first semiconductor chip.

Semiconductor device

A lead frame comprises a plurality of frame assemblies. Each framework assembly includes a framework, a suspension lead, a die pad, a plurality of inner leads and outer leads, a first tie bar and a second tie bar, and a lead support. The plurality of framework assemblies are disposed alongside of one another in a direction perpendicular to a direction in which the plurality of outer leads extend. A distance between close-set outer leads in each two neighboring frameworks is substantially n times a pitch of the plurality of outer leads in each framework, wherein n is an integer.

Lead frame, and method for manufacturing semiconductor device and method for inspecting electrical properties of small device using the lead frame

A semiconductor package includes an upper substrate having an opening portion, a solder ball for connection between substrates arranged on the lower side of the upper substrate, a lower substrate arranged on the further lower side and having an opening portion, a solder ball for external connection connected on the lower surface of the lower substrate, and a semiconductor chip affixed on each substrate. The semiconductor chip is electrically connected to the solder ball through the opening portion of each substrate. The solder ball for connection between substrates is electrically connected to the solder ball for external connection.

Semiconductor package including stacked semiconductor chips

A semiconductor module includes a substrate having a pad electrode on a surface, a lower layer semiconductor package mounted on the substrate, and an upper layer semiconductor package mounted on the substrate while arranged in a position substantially overlying the former. The pad electrodes connected to the leads of these semiconductor packages are arranged alternately. The lead has a dambar residual portion. An inner surface of a lead downward portion of the upper layer semiconductor package is positioned outside an outer surface of a lead downward portion of the lower layer semiconductor package.

Semiconductor module having an upper layer semiconductor package overlying a lower layer semiconductor package

In an LOC semiconductor device, a semiconductor chip is fixed on a die pad through a die pad material. A lead including an internal lead extending to the vicinity of a pad provided to the semiconductor chip is put in place. A tape member is placed at positions corresponding to four corners of the semiconductor chip between the internal lead and the semiconductor chip. The tape member is bonded and fixed only to the internal lead but it is not bonded or fixed to the semiconductor chip and merely contacts the surface of the semiconductor chip.

Sealed semiconductor device and lead frame used for the same

A semiconductor module achieving higher density of the semiconductor module itself as well as of being disposed in an area-efficient manner relative to another electronic component, such as a mother board and the like. The semiconductor module includes a mounting substrate having, on an underside, a solder ball for connecting to an interconnection of a mother board and semiconductor packages mounted in multiple layers on the top side of the mounting substrate and connected to electrodes on the mounting substrate.

Semiconductor module and electronic component

A plastic packaged semiconductor device is constructed by sealing, with a sealing plastic, a semiconductor chip which has an electrode pad arranged in a central portion of an upper surface, a die pad to which the semiconductor chip is die-bonded, bonding wires which are connected to the electrode pad, and inner leads which are arranged in close vicinity of the die pad and have tip portions having upper flat surfaces which are positioned at a level equal to or higher than the upper surface of the semiconductor chip and to which the bonding wires are connected. Accordingly, the small thin plastic packaged semiconductor device in which the bonding wires do never come into contact with the edge of the semiconductor chip can be achieved.

Lead frame with raised leads and plastic packaged semiconductor device using the same

A laminated semiconductor chip assembly fabricated by fixing back surfaces of first and second semiconductor chips, respectively having principal surfaces and back surfaces, to each other. Each of the principal surfaces of the laminated semiconductor chip assembly is fixed to a corresponding surface of a lead frame. A standing linear portion of a metallic wire on a ball bond side is pulled parallel to a side surface of the semiconductor chip in its thickness direction and a side surface of the inner lead in its thickness direction, and subjected to wire bonding. The formed semiconductor chip assembly is covered by a sealing resin so that an outer lead protrudes from the sealing resin. Thus, the semiconductor device can be made thin, cost can be reduced, and quality can be improved to increase capacities of electronic equipment.

Semiconductor device and a method of producing the same

Integrated circuits substrate

A back surface of a semiconductor chip having an integrated circuit for a 64M DRAM is die-bonded to a first surface of a die pad provided virtually in the middle of the thickness of encapsulations resin, an electrode thereof and an upper surface of the tip end of an inner lead are wire bonded with a metal wire. A back surface of a semiconductor chip having an integrated circuit for a flash memory is die-bonded to a second surface of the die pad, and an electrode arranged at an end on the longer side and a back surface of an inner lead root portion are wire-bonded with a metal wire. Then, these elements are integrally encapsulated with encapsulation resin. Thus, a thin, compact, reliable and inexpensive lead frame with large integration capacity and a resin-encapsulated semiconductor device using the lead frame produced by integrally resin-encapsulating a plurality of semiconductor chips including at least a center pad type semiconductor chip are provided.

Resin-encapsulated semiconductor device

In order to reduce the thickness of a semiconductor device and double its capacity, two center pad semiconductor chips stacked one on the other, back to back, are fixed to one face of a wiring substrate. The difference in the length of routing between external lands and fingers is minimized, and each of the center pads and corresponding fingers are connected via metal wires having a high conductivity. The main face of a first center pad semiconductor chip is fixed to the wiring substrate that has first and second wired faces and a through opening. The back face of the first semiconductor chip and the back face of a second semiconductor chip are fixed to each other using a bonding material. The pads on each semiconductor chip are connected to corresponding fingers on the wiring substrate via metal wires. One face of the wiring substrate is sealed with a sealing resin, and on the other face, an area in the vicinity of the through opening is sealed.

Multiple chip package semiconductor device

A semiconductor package includes a semiconductor chip, a die pad, an adhesive, metal wires, LOC inner leads, and standard inner leads sealed within a sealing resin. The LOC inner leads and the standard inner leads are arranged in the same plane and both are arranged along one side of the semiconductor chip. Clearance between the inner leads and the die pad larger than the total thickness of the semiconductor chip and the bonding material. Thus, a semiconductor chip having electrode pads broadly distributed can be employed and the section modulus of the semiconductor package can be increased.

Semiconductor package

A semiconductor device includes a first semiconductor package and a second semiconductor package which is mounted onto the first semiconductor package. The first semiconductor package has lands on an upper surface for mounting the second semiconductor package and lands on the lower surface for external connection, which are used for connection with a mounting substrate. The second semiconductor package has external leads which are connected to the lands for mounting the second semiconductor package.

Growing community of inventors

Tokyo, Japan

Kazunari Michii