Mitsubishi Denki Kabushiki Kaisha

Nippon Thermostat Co., Ltd.

Kazuko Nakamura

Hiroshi Horibe

Shinji Toyosaki

A wire bonding method for joining a metal wire with a bonding pad disposed on a semiconductor element by using a load and supersonic wave vibration, comprising: during interval of time from contact of the metal wire with the bonding pad to application of the supersonic wave vibration, continuously applying a first bonding load and a second bonding load which is lower than the first bonding load; and after application of the supersonic wave vibration, continuously applying a third bonding load of a size of about 50% of the load of the second bonding load and a fourth bonding load which is lower than the first bonding load and higher than the third bonding load. The reliability of the fine wire bonding joint is improved remarkably, whereby a high quality semiconductor device cna be produced at a low cost.

Wire bonding apparatus

A wire bonding method for joining a metal wire with a bonding pad disposed on a semiconductor element by using a load and supersonic wave vibration, comprising: during interval of time from contact of the metal wire with the bonding pad to application of the supersonic wave vibration, continuously applying a first bonding load and a second bonding load which is lower than the first bonding load; and after application of the supersonic wave vibration, continuously applying a third bonding load of a size of about 50% of the load of the second bonding load and a fourth bonding load which is lower than the first bonding load and higher than the third bonding load. The reliability of the fine wire bonding joint is improved remarkably, whereby a high quality semiconductor device can be produced at a low cost.

Wire bonding method, wire bonding apparatus and semiconductor device

A semiconductor wafer, a semiconductor device, and a method of manufacturing the semiconductor device which prevent corrosion of pads in a semiconductor integrated circuit. A semiconductor wafer having semiconductor integrated circuits and interconnections extending from wire-bonding pads on the semiconductor integrated circuits to a dicing line is cut along the dicing line into chips. Part of the interconnections are left on the chips as wafer testing pad remainders, and the surfaces of the wafer testing pad remainders are covered with an insulating film, preventing the invasion of water from the wafer testing pad remainders and corrosion of the wire-bonding pads in the semiconductor integrated circuit, improving reliability and durability of the semiconductor device.

Growing community of inventors

Tokyo, Japan

Kazuko Nakamura