Renesas Electronics Corporation

Nec Corporation

Ricoh Company, Ltd.

Kazuki Ota

Yasuhiro Okamoto

Yuji Ando

Tatsuo Nakayama

Hironobu Miyamoto

Takashi Inoue

Yasuhiro Murase

Akio Wakejima

Naotaka Kuroda

Kazuomi Endo

Katsumi Yamanoguchi

Kensuke Kasahara

Hidenori Shimawaki

Kohji Matsunaga

Masaaki Kuzuhara

Naotaka Iwata

Takehiko Kato

Masanobu Kimata

Yusuke Hirono

Yuji Susaki

Yuta Yanai

Yohei Yamazaki

Yuji Miyachi

A medium processing apparatus includes a conveyor, a tray, a binder, a mover, and a switcher. The switcher includes a first passage, a second passage, and a movable wall. The movable wall guides a guided portion of the binder to the second passage when the guided portion moving along the first passage from an end side to a center side contacts the movable wall; causes the guided portion to pass when the guided portion moving along the second passage from the end side to the center side contacts the movable wall; guides the guided portion to the first passage when the guided portion moving along the second passage from the center side to the end side contacts the movable wall; and causes the guided portion to pass when the guided portion moving along the first passage from the center side to the end side contacts the movable wall.

Medium processing apparatus and image forming system incorporating same

In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer). To gate length Lg of a FET to be prepared, a sum a of layer thicknesses of an electron supply layer and a channel layer is selected so as to fulfill Lg/a&#x2265;5, and in such a case, the layer thickness of the channel layer is selected in a range of not exceeding 5 times (about 500 &#x212b;) as long as a de Broglie wavelength of two-dimensional electron gas accumulated in the channel layer in room temperature.

Field effect transistor, and multilayered epitaxial film for use in preparation of field effect transistor

A semiconductor device is provided with: a field-effect transistor that has a source electrode and a drain electrode that are connected to a semiconductor layer, a gate electrode that is provided on the surface of the semiconductor layer between the source electrode and the drain electrode, and a field plate electrode that is provided on the surface of the semiconductor layer in the vicinity of the gate electrode via an insulating layer, wherein the field-effect transistor amplifies high frequency signals received by the gate electrode to be outputted from the drain electrode; and a voltage dividing circuit that divides a potential difference between the drain electrode and a reference potential GND, and applies a bias voltage such that respective parts of the field plate electrode have a mutually equal potential.

Semiconductor device

A high electron mobility transistor having a channel layer, electron supply layer, source electrode, and drain electrode is included so as to have a cap layer formed on the electron supply layer between the source and drain electrodes and having an inclined side surface, an insulating film having an opening portion on the upper surface of the cap layer and covering the side surface thereof, and a gate electrode is formed in the opening portion and extending, via the insulating film, over the side surface of the cap layer on the drain electrode side. The gate electrode having an overhang on the drain electrode side can reduce the peak electric field.

A semiconductor device including a field effect transistor including a substrate, a lower barrier layer provided on the substrate, a channel layer provided on the lower barrier layer, an electron supplying layer provided on the channel layer, a source electrode and a drain electrode provided on the electron layer, and a gate electrode provided between the source electrode and the drain electrode. The lower barrier layer includes a composition of InAlN (0&#x2266;z&#x2266;1). The channel layer includes a composition of AlGaN (0&#x2266;x&#x2266;1). A recess is provided in a region between the source electrode and the drain electrode, wherein the recess goes through the electron supplying layer to a depth that exposes the channel layer, and the gate electrode is disposed on a gate insulating film that covers a bottom surface and an inner wall surface of the recess.

Semiconductor device and field effect transistor with controllable threshold voltage

A field effect transistor includes a substrate and a semiconductor layer provided on the substrate, wherein the semiconductor layer includes a lower barrier layer provided on the substrate, Ga-face grown, lattice relaxed, and having a composition InAlN (0&#x2266;z&#x2266;1), a channel layer having a composition of: AlGaN (0&#x2266;x&#x2266;1) or InGaN (0&#x2266;y&#x2266;1). Or GaN provided on and lattice-matched to the lower barrier layer, a source electrode and a drain electrode having ohmic contact to an upper part of the semiconductor layers, disposed spaced to each other, and a gate electrode arranged via a gate insulating film in a region lying between the source electrode and the drain electrode.

Provided is a semiconductor device in which the trade-off between the withstand voltage and the on-resistance is improved and the performance is increased. A semiconductor device comprises a substrate, a first n-type semiconductor layer', a second n-type semiconductor layer, a p-type semiconductor layer, and a third n-type semiconductor layer&#x2032;, wherein the first n-type semiconductor layer&#x2032;, the second n-type semiconductor layer, the p-type semiconductor layer, and the third n-type semiconductor layer&#x2032; are laminated at the upper side of the substratein this order. The drain electrodeis in ohmic-contact with the first n-type semiconductor layer&#x2032; and the source electrodeis in ohmic-contact with the third n-type semiconductor layer&#x2032;. A gate electrodeis arranged so as to fill an opening portion to be filled that extends from the third n-type semiconductor layer&#x2032; to the second n-type semiconductor layer, and the gate electrodeis in contact with the upper surface of the second n-type semiconductor layer, the side surfaces of the p-type semiconductor layer, and the side surfaces of the third n-type semiconductor layer&#x2032;. The second n-type semiconductor layerhas composition that changes from the drain electrodeside toward the source electrodeside in the direction perpendicular to the plane of the substrateand contains donor impurity.

Semiconductor device and field effect transistor

Field effect transistor containing a group III nitride semiconductor as main component

The present invention provides a field effect transistor which can achieve both of a high threshold voltage and a low on-state resistance, a method for producing the same, and an electronic device. In the field effect transistor, each of a buffer layer, a channel layer, a barrier layer, and a spacer layeris formed of a group-III nitride semiconductor, and each of the upper surfaces thereof is a group-III atomic plane that is perpendicular to a (0001) crystal axis. The lattice-relaxed buffer layer, the channel layerhaving a compressive strain, and the barrier layerhaving a tensile strain, and the spacer layerhaving a compressive strain are laminated on a substratein this order. The gate insulating filmis arranged on the spacer layer. The gate electrodeis arranged on the gate insulating film. The source electrodeand the drain electrodeare electrically connected to the channel layerdirectly or via another component.

Field effect transistor, method for producing the same, and electronic device

In a high electron mobility transistor, with a normally-off operation maintained, on-resistance can be sufficiently reduced, so that the performance of a semiconductor device including the high electron mobility transistor is improved. Between a channel layer and an electron supply layer, a spacer layer whose band gap is larger than the band gap of the electron supply layer is provided. Thereby, due to the fact that the band gap of the spacer layer is large, a high potential barrier (electron barrier) is formed in the vicinity of an interface between the channel and the electron supply layer.

Semiconductor device and method of manufacturing the same

In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer). To gate length Lg of a FET to be prepared, a sum a of layer thicknesses of an electron supply layer and a channel layer is selected so as to fulfill Lg/a&#x2267;5, and in such a case, the layer thickness of the channel layer is selected in a range of not exceeding 5 times (about 500 &#x212b;) as long as a de Broglie wavelength of two-dimensional electron gas accumulated in the channel layer in room temperature.

A semiconductor device includes semiconductor layers, an anode electrode, and a cathode electrode. The semiconductor layers include a composition change layer, the anode electrode is electrically connected to one of principal surfaces of the composition change layer through a formation of a Schottky junction between the anode electrode and a part of the semiconductor layers, the cathode electrode is electrically connected to the other of the principal surfaces of the composition change layer through a formation of a junction between the cathode electrode and another part of the semiconductor layers, the anode electrode and the cathode electrode are capable of applying a voltage to the composition change layer in a direction perpendicular to the principal surface.

Semiconductor device, schottky barrier diode, electronic apparatus, and method of producing semiconductor device

A bipolar transistor is provided with an emitter layer, a base layer and a collector layer. The emitter layer is formed above a substrate and is an n-type conductive layer including a first nitride semiconductor. The base layer is formed on the emitter layer and is a p-type conductive including a second nitride semiconductor. The collector layer is formed on the base layer and includes a third nitride semiconductor. The collector layer, the base layer and the emitter layer are formed such that a crystal growth direction to the substrate surface is parallel to a substrate direction of [000-1]. The third nitride semiconductor contains InAlGaN (0&#x2022;xc&#x2022;1, 0&#x2022;yc&#x2022;1, 0&#x3c;xc+yc&#x2022;1). The a-axis length on the side of a surface in the third nitride semiconductor is shorter than the a-axis length on the side of the substrate.

Bipolar transistor

A field effect transistor includes: a channel layercontaining GaN or InGaN; a first electron-supplying layerdisposed over the channel layerand containing InAlGaN (0&#x2266;x&#x3c;1, 0&#x3c;y&#x3c;1, 0&#x3c;x+y&#x3c;1); a first etch stop layerdisposed over the first electron-supplying layerand containing indium aluminum nitride (InAlN); and a second electron-supplying layerprovided over the first etch stop layerand containing InAlGaN (0&#x2266;a&#x3c;1, 0&#x3c;b&#x3c;1, 0&#x3c;a+b&#x3c;1). A first recess, which extends through the second electron-supplying layerand the first etch stop layerand having a bottom surface constituted of a section of the first electron-supplying layer, is provided in the second electron-supplying layerand the first etch stop layer. A gate electrodecovers the bottom surface of the first recessand is disposed in the first recess. The second electron-supplying layer is provided so as to overlap with regions of an interface between the first electron-supplying layerand the channel layerexcept a region thereof under the bottom surface of the first recesscovering the gate electrode

Field effect transistor and process for manufacturing same

A heterojunction filed effect transistor with a low access resistance, a low on resistance, and the like, a method for producing a heterojunction filed effect transistor and an electron device are provided. In the heterojunction field effect transistor, an electron transit layerformed of a III-nitride semiconductor is formed on a substrate, an electron supply layerformed of a III-nitride semiconductor forms a heterojunction with an upper surface of the electron transit layer, a gate electrode, a source electrodeA, and a drain electrodeB are arranged on the electron supply layer, n-type conductive layer regionsA andB each extended from an upper part of the electron transit layerto an upper surface of the electron supply layerare provided in at least a part below the source electrodeA and a part below the drain electrodeB, and an n-type impurity concentration at a heterojunction interface of an electron transit layerpart of each of the n-type conductive layer regionsA andB with the electron supply layeris 1&#xd7;10cmor more.

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Tokyo, Japan

Kazuki Ota