Mitsubishi Electric Corporation

Mitsubishi Denki Kabushiki Kaisha

Calsonic Kansei Corporation

Mitsubishi Heavy Industries Limited

Calsonic Corporation

Fuji Hollow Valve Inc.

Mitsubishi Heavy Industries Machine Tool Co., Ltd.

Yoshimura Company

Katsumi Nakamura

Tadaharu Minato

Ze Chen

Hideki Kobayashi

Kenji Makino

Tetsuo Takahashi

Masana Harada

Hiroyasu Koizumi

Hiroshi Chikuma

Hideki Nakamura

Takuya Goto

Shigeru Kusunoki

Katsuomi Shiozawa

Toshiaki Yamamoto

Satoshi Ishihara

Makoto Tajima

Minoru Tsuchiya

Kunio Matsugi

Yoshiki Tsuda

Junichi Enari

Mamoru Baba

Kenji Suzuki

Koichi Nishi

Akito Nishii

Shuuichi Tominaga

Akio Uenishi

Takahiro Inagaki

Makoto Hirai

Fumihito Masuoka

Koji Tanaka

Tsuyoshi Kawakami

Haruo Ikeda

Naoki Goto

Toshihiro Tombe

Tsuyoshi Kaneko

Masanobu Mizukami

Hideyuki Suzuki

Hiroshi Koizumi

Akihiko Furukawa

Takeshi Yamada

Atsushi Narazaki

Satoshi Kimura

Fumihiro Inoue

Tatsuo Harada

Daisuke Oya

Ryu Kamibaba

Hirokazu Morii

Koji Sadamatsu

Kazuto Nakamura

Mitsuru Kaneda

Hyoji Yoshimura

Akira Kono

Kakeru Otsuka

Michinobu Takahagi

Kenichiro Hirao

Yuji Murakami

Takahiro Nakakomi

Takao Kachi

Shiro Nakajima

Michitake Sumida

Hirokazu Yaezawa

Yoshinobu Okuno

Hayato Okamoto

Hiroto Mori

Noritsugu Nomura

Yusuke Fukada

Kenichi Tsuruda

Hironori Muramoto

Jiro Wada

Katsuji Mashio

Yukinobu Take

Shuuichi Tominga

Junichi Takeshita

In a power semiconductor device, the present disclosure is intended to control tradeoff characteristics while realizing operation in a high-speed side range of the tradeoff characteristics without depending on a carrier lifetime control technique. An n+ cathode layer includes a first n+ cathode layer contacting a second metal layer, and a second n+ cathode layer provided between the first n+ cathode layer and an n buffer layer while contacting the first n+ cathode layer and the n buffer layer. Crystal defect density in the first n+ cathode layer is higher than crystal defect density in the second n+ cathode layer. The n+ cathode layer is absent in an intermediate region and a terminal region.

Power semiconductor device and method of manufacturing power semiconductor device

A semiconductor device includes a semiconductor substrate, a drift layer of a first conductivity type, a buffer layer of the first conductivity type, a first semiconductor layer, and a second semiconductor layer. The first semiconductor layer and the second semiconductor layer are provided on the side of the second main surface of the semiconductor substrate with respect to the buffer layer. The first semiconductor layer and the second semiconductor layer are arranged in this order in a direction from the second main surface toward the first main surface of the semiconductor substrate. The first semiconductor layer and the second semiconductor layer have conductivity types identical to each other. The second semiconductor layer has a larger number of atoms of impurities per unit volume than the first semiconductor layer.

Semiconductor device and method for manufacturing the same

A semiconductor device according to the present disclosure includes: a semiconductor substrate with a first main surface and a second main surface; a drift layer of a first conductivity type formed in the semiconductor substrate; a first impurity diffusion layer of a second conductivity type formed on the drift layer to be closer to the first main surface; and a buffer layer of the first conductivity type formed on the drift layer to be closer to the second main surface and higher in peak impurity concentration than the drift layer. The drift layer has a first trap, a second trap, and a third trap, whose energy level each is lower than energy at a bottom of a conduction band by 0.246 eV, 0.349 eV, and 0.470 eV. The second trap has trap density of equal to or greater than 2.0×10cm.

Semiconductor device and method of manufacturing semiconductor device

A semiconductor device includes: an Ndrift layer of a first conductivity type formed in the semiconductor substrate; a P base layer formed on the Ndrift layer; and an N buffer layer of the first conductivity type formed under the Ndrift layer and higher in peak impurity concentration than the Ndrift layer. The N buffer layer includes: a first buffer layer in which a trap level derived from lattice defect is not detected by a photoluminescence method; and a second buffer layer provided between the first buffer layer and the Ndrift layer and in which two types of trap levels derived from lattice defect are detected by the photoluminescence method.

Method of manufacturing semiconductor device

A semiconductor device includes: a drift layer of a first conduction type provided in a semiconductor substrate having a first principal plane and a second principal plane opposed to the first principal plane; a first semiconductor layer of a second conduction type provided between the first principal plane of the semiconductor substrate and the drift layer and having impurity concentration higher than impurity concentration of the drift layer; a first buffer layer of a first conduction type provided between the second principal plane of the semiconductor substrate and the drift layer and having hydrogen-induced donors with impurity concentration higher than impurity concentration of the drift layer; and a second semiconductor layer of a first conduction type or a second conduction type provided between the second principal plane of the semiconductor substrate and the first buffer layer and having impurity concentration higher than impurity concentration of the drift layer, wherein the first buffer layer includes a complex defect of interstice carbon and interstice oxygen having density decreasing from the second principal plane side toward the first principal plane side.

Semiconductor device comprising a buffer layer including a complex defect of interstice carbon and interstice oxygen

To provide a robot control system and a robot control method capable of placing a component grasped by a robot hand at an accurate location on another member. A robot control system is provided with: a robot hand configured to grasp a clip; a camera configured to capture an image of the clip grasped by the robot hand, a calculation unit configured to calculate a position of the clip or an inclination of a component based on an imaging result of the clip captured by the camera, and a robot control unit configured to control the robot hand to adjust, based on the position of the clip or the inclination of the component calculated by the calculation unit, a position or an inclination of the robot hand and move the clip to a stringer.

Robot control system and robot control method

A semiconductor device includes an N-type drift layer provided between a first main surface and a second main surface of the semiconductor substrate and an N-type buffer layer provided between the N-type drift layer and the first main surface and having a higher impurity peak concentration than the N-type drift layer. The N-type buffer layer has a structure that a first buffer layer, a second buffer layer, a third buffer layer, and a fourth buffer layer are disposed in this order from a side of the first main surface. When a distance from an impurity peak position of the first buffer layer to an impurity peak position of the second buffer layer is L12 and a distance from an impurity peak position of the second buffer layer to an impurity peak position of the third buffer layer is L23, a relationship of L23/L12&#x2265;3.5 is satisfied.

Semiconductor device

An object is to provide a technique of improving productivity of a semiconductor device. A first buffer layer includes a first portion located in a thickness direction of a semiconductor substrate from a main surface and having a first peak of an N type impurity concentration and a second portion located farther away from the main surface than the first portion and having a second peak of an N type impurity concentration. A distance from the main surface to the first portion is equal to or smaller than 4.0 &#x3bc;m, and a distance from the first portion to the second portion is equal to or larger than 14.5 &#x3bc;m. An N type impurity concentration of a portion between the first portion and the second portion is higher than an N type impurity concentration of a drift layer.

Semiconductor device including first and second buffer layers

The object is to provide an aircraft component positioning device, an aircraft assembly system, and an aircraft assembly method with which it is possible to precisely dispose components on a planar member of an aircraft without using a positioning jig. A positioning device () includes a detection unit () that detects positions of a plurality of first components installed on a planar member of an aircraft, a virtual position creation unit () that creates a virtual position between the plurality of first components on the basis of the positions of the plurality of first components that are detected, and a position determination unit () that, on the basis of the virtual position that is created, determines an installation position of a second component, different from the plurality of first components, that is installed on the planar member.

Aircraft component positioning device, and aircraft assembly system

An object of the present invention is to provide stable withstand voltage characteristics, reduce turn-off losses along with a reduction in leakage current when the device is off, improve controllability of turn-off operations, and improve blocking capability at turn-off. An N buffer layer includes a first buffer layer joined to an active layer and having one peak in impurity concentration, and a second buffer layer joined to the first buffer layer and an Ndrift layer, having at least one peak point in impurity concentration, and having a lower maximum impurity concentration than the first buffer layer. The impurity concentration at the peak point of the first buffer layer is higher than the impurity concentration of the Ndrift layer, and the impurity concentration of the second buffer layer is higher than the impurity concentration of the Ndrift layer in the entire area of the second buffer layer.

Semiconductor device and manufacturing method thereof

A semiconductor device of the present invention includes a substrate having a drift layer, metal wiring formed on an upper surface of the substrate, and an electrode formed on a back surface of the substrate, wherein the lifetime of carriers in the drift layer satisfies the following expression 1: [Expression 1]&#x3c4;&#x2265;1.5&#xd7;10exp(5.4&#xd7;10)&#x2003;&#x2003;expression 1

Method for manufacturing semiconductor device

A semiconductor device includes a semiconductor substrate in which an active region and an edge termination region are defined, a semiconductor element formed in the active region, and first to fourth P layers formed in a region spanning from an edge portion of the active region to the edge termination region in the surface of the semiconductor substrate. The first to fourth P layers respectively have surface concentrations P(1) to P(4) that decrease in this order, bottom-end distances D(1) to D(4) that increase in this order, and distances B(1) to B(4) to the edge of the semiconductor substrate that increase in this order. The surface concentration P(4) is 10 to 1000 times the impurity concentration of the semiconductor substrate, and the bottom-end distance D(4) is in the range of 15 to 30 &#x3bc;m.

To hold a long member in the original shape of the long member at a precise position, a long member assembling device has: a plurality of hand parts configured to grip a long member; arm parts and trunk parts configured to move the hand parts to adjust the positions of the plurality of hand parts gripping the long member; a storage unit in which the original shape of the long member is stored; and a control unit configured to, on the basis of the original shape of the long member stored in the storage unit, drive the arm parts and the trunk parts to adjust the positions of the plurality of hand parts gripping the long member such that the shape of the long member gripped by the plurality of hand parts matches the original shape of the long member stored in the storage unit.

Assembly body manufacturing device and assembly body manufacturing method

Growing community of inventors

Tokyo, Japan

Katsumi Nakamura