Sharp Kabushiki Kaisha Corporation

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Sharp Corporation

Katsuki Furukawa

Akira Suzuki

Yoshihisa Fujii

Mitsuhiro Shigeta

Atsuko Uemoto

Akitsugu Hatano

Yoshimitsu Tajima

Kenji Nakanishi

Norikatsu Koide

Yoshio Honda

Nobuhiko Sawaki

Atsuko Ogura

Shigetoshi Ito

Tomoki Ono

Daisuke Hanaoka

Satoshi Sugahara

Hajime Saito

Yoshiyuki Higashigaki

Shigeo Harada

Masahito Yamaguchi

Norifumi Kameshiro

A semiconductor laser device includes a substrate and an n-GaN layer composed of a nitride semiconductor formed on the substrate. The substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the substrate, or a plane inclined within 3 degrees in an arbitrary direction from the inclined plane. The n-GaN layer is formed on the slope. On the n-GaN layer are formed a lower clad layer, an active layer, and an upper clad layer, each composed of a nitride semiconductor. The active layer has a plane orientation substantially matching the plane orientation of the main plane.

Semiconductor laser device and fabrication method thereof

A semiconductor device includes a silicon substrate and a compound semiconductor layer formed on a main plane of the silicon substrate. The compound semiconductor layer is represented by the general formula of In Ga Al N (where x&plus;y&plus;z&equals;1, 0&lE;x&lE;1, 0&lE;y&lE;1, 0&lE;z&lE;1). The silicon substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the silicon substrate, or a plane inclined in a range within 3 degrees in an arbitrary direction from the inclined plane. The compound semiconductor layer is formed on the slope. The semiconductor device includes compound semiconductor layers represented by Al Ga In N (where x&plus;y&plus;z&equals;1, 0&lE;x&lE;1, 0&lE;y&lE;1, 0&lE;z&lE;1) on a silicon substrate. The silicon substrate has a main plane constituted by a plane in a range of &plusmn;5 degrees in an arbitrary direction from a (112) plane. The compound semiconductor layers are formed on the main plane.

Semiconductor device including an InGaAIN layer

A Ill-V nitride compound semiconductor device of the present invention includes: at least one III-V nitride compound semiconductor layer; and an electrode layer made of non-single crystalline GaN in contact with the III-V nitride compound semiconductor layer.

III-V nitride compound semiconductor device and method for fabricating

A dry etching method for etching a gallium nitride type compound semiconductor is disclosed. The method uses a mixed gas including silicon tetrachloride (SiCl.sub.4) gas and chlorine (Cl.sub.2) gas as an etching gas in a reactive ion etching.

Dry etching method for a gallium nitride type compound semiconductor

There is provided a method of producing a high-quality n-type, 6H silicon carbide single crystal with good reproducibility. A silicon carbide single crystal substrate having a growth orientation of &lt;0001&gt;, as a seed crystal, is mounted to an inner surface of a cover of a graphite crucible. A source material includes a high-purity silicon carbide powder having an impurity proportion of not more than 1 ppm and an aluminum powder of 50 ppm relative to the silicon carbide powder. The source material is loaded into the graphite crucible. The graphite crucible is closed with a seed crystal-mounted cover placed in a double quartz tube. Ar gas and N.sub.2 gas are caused to flow in the double quartz tube. Temperature of the silicon carbide powder and aluminum powder is controlled to 2300.degree. C., and temperature of the silicon carbide single crystal substrate to 2200.degree. C.; and interior of the double quartz tube is controlled to 30 torr. Silicon carbide single crystal growth is effected on the seed crystal under these conditions. A high-quality n-type, 6H silicon carbide single crystal is thus obtained which has a uniform crystal structure with little defect, if any, throughout its structure, from the substrate surface to the outermost grown surface, and has a specific resistance of 0.5 .OMEGA.cm.

Method of producing silicon-carbide single crystals by sublimation

A light emitting diode is disclosed which comprises at least one heterojunction composed of silicon carbide (SIC) and semiconductor materials selected from the group consisting of gallium nitride (GAN), aluminum nitride (AlN), and aluminum gallium nitride (Ga.sub.x Al.sub.1-x N, 0&lt;x&lt;1).

Light emitting diode

A light emitting diode of silicon carbide having a p-n junction comprising an n-type layer doped with donor impurities, a first p-type layer doped with acceptor impurities, and a second p-type layer doped with acceptor impurities and donor impurities. The first p-type layer has a thickness less than the diffusion length of electrons having flowed from the n-type layer. In this way, the first p-type layer effects light emission related to the acceptor impurities which recombine with the electrons having flowed from the n-type layer, and the second p-type layer effects light emission by donor-acceptor pairs which recombine with the electrons having flowed from the n-type layer.

A silicon carbide semiconductor device is provided which includes at least one heterojunction composed of two different polytypes of silicon carbide. The two polytypes of silicon carbide in the heterojunction include a .beta.-type silicon carbide layer having an .alpha.-type silicon carbide layer disposed thereon.

Silicon carbide semiconductor device

A method for growing a silicon carbide single crystal on a seed crystal using a molecular beam source in vacuo by means of a molecular beam epitaxy, wherein a material in the molecular beam source is silicon carbide. A silicon molecular beam source and/or an impurity molecular beam source for doping may be further used. Temperatures of the silicon carbide molecular beam source, the silicon molecular beam source, the impurity molecular beam source and the seed crystal are independently controlled. Vapor compositions are controlled by the silicon carbide molecular beam source, the silicon molecular beam source and the impurity molecular beam source.

Method for growing a silicon carbide single crystal

A method for the growth of silicon carbide single crystals is disclosed which includes the step of growing silicon carbide single crystals on a silicon single-crystal substrate. The silicon single-crystal substrate has growth areas with a crystal orientation inclined by an angle .theta. from the [100] direction toward at least one of the [011] and [011] directions and with a lateral dimension d taken along the direction of such inclination toward the [011] or [011] direction. The angle .theta. is set to be in the range of zero to tan.sup.-1 (.sqroot.2/8) degrees (with the proviso that the angle .theta. is not equal to tan.sup.-1 (.sqroot.2/2) degrees). The lateral dimension d is set to be in the range of 0.1 to 100 .mu.m. In this method, the silicon carbide single crystals are grown to a thickness t approximately equal to or greater than (.sqroot.2+tan.theta.)d/.vertline.1-.sqroot.2tan.theta..vertline., so that these silicon carbide single crystals are substantially free of defects such as stacking faults.

Method for the growth of silicon carbide single crystals

A silicon thin-film is formed on a silicon carbide (SiC) semiconductor body through the use of the thermal decomposition of monosilane (SiH.sub.4) gas. The thus formed silicon thin-film is oxidized by a thermal oxidation method which employs an oxygen gas so as to form a silicon oxide film of about 600 to 1200 .ANG. on the silicon carbide (SiC) semiconductor. The silicon oxide film shows a sharp boundary between the silicon carbide (SiC) semiconductor. An aluminum electrode is formed on the silicon oxide film, thereby providing a MOS structure on the silicon carbide (SiC) semiconductor.

Manufacture of silicon carbide (SiC) metal oxide semiconductor (MOS)

There are provided silicon carbide light emitting diodes having a p-n junction which is constituted by a p-type silicon carbide single-crystal layer and an n-type silicon carbide single-crystal layer formed thereon. In cases where light emission caused by recombination of free excitons is substantially utilized, at least a part of the n-type silicon carbide layer adjacent to the interface of the p-n junction is doped with a donor impurity at a concentration of 5.times.10.sup.16 cm.sup.-3 or lower. In cases where light emission caused by acceptor-associated recombination is substantially utilized, the p-type silicon carbide layer is doped with an acceptor impurity and at least a part of the n-type silicon carbide layer adjacent to the interface of the p-n junction is doped with a donor impurity at a concentration of 1.times.10.sup.18 cm.sup.-3 or higher. Also provided are a method for producing such silicon carbide light emitting diodes and a method for producting another silicon carbide light emitting diode.

Silicon carbide light emitting diode and a method for the same

There is provided a method for the production of a silicon carbide single crystal, which includes the steps of: providing a silicon single-crystal substrate having a growth plane with a crystal orientation inclined from the [100] direction toward an off-direction, wherein the crystal orientation is defined by a deviation angle .theta. of 5 to 40 degrees, as measured from the [011] direction toward the [011] direction, and a tilt angle .phi. of 1 to 7 degrees, as measured from the [100] direction toward the off-direction; and growing a silicon carbide single crystal on the substrate.

Method for the production of SiC single crystals by using a specific

The semiconductor device somprises a silicon substrate, a boron-doped high resistant silicon carbide layer formed on said silicon substrate and a silicon carbide layer formed on said high resistant silicon carbide layer.

Schottky barrier gate type field effect transistor

A silicon carbide field-effect transistor is disclosed which includes an MOS structure composed successively of a silicon carbide layer, a gate insulator film, and a gate electrode. The field-effect transistor has source and drain regions formed in the silicon carbide layer, between which the MOS structure is disposed, wherein at least one of the source and drain regions is formed by the use of a Schottky contact on the silicon carbide layer.

Growing community of inventors

Sakai, Japan

Katsuki Furukawa