Infineon Technologies Ag

Kabushiki Kaisha Toshiba

Infineon Ag

Karl Hornik

Rainer Bruchhaus

Ulrich Egger

Haoren Zhuang

Andreas Hilliger

Jenny Lian

Stefan Gernhardt

Nicolas Nagel

Jingyu Lian

Uwe Wellhausen

Bum-Ki Moon

John Anthony Fitzsimmons

Koji Yamakawa

Darryl D Restaino

Hiroshi Itokawa

Michael Beck

Gerhard Beitel

Bum-ki Moon

Embodiments of the invention provide a semiconductor device having dielectric material and its method of manufacture. A method comprises a short (&#x2266;2 sec) flash activation of an ILD surface followed by flowing a precursor such as silane, DEMS, over the activated ILD surface. The precursor reacts with the activated ILD surface thereby selectively protecting the ILD surface. The protected ILD surface is resistant to plasma processing damage. The protected ILD surface eliminates the requirement of using a hard mask to protect a dielectric from plasma damage.

Minimizing low-k dielectric damage during plasma processing

Ferrocapacitors having a vertical structure are formed by a process in which a ferroelectric layer is deposited over an insulator. In a first etching stage, the ferroelectric material is etched to form openings in it, leaving the insulating layer substantially intact. Then a conductive layer is deposited into the openings formed in the ferroelectric layer, forming electrodes on the sides of the openings. Further etching is performed to form gaps in the AlOlayer, for making connections to conductive elements beneath it. Thus, by the time the second etching step is performed; there are already electrodes overlying the sides of the ferroelectric material, without insulating fences in between.

Method for forming ferrocapacitors and FeRAM devices

In a process for fabricating a ferrocapacitor comprising providing ferroelectric PZT elements over an AlOlayer, the AlOlayer is covered with a seed layer comprising layers of PZT and TiO. Then a thicker layer of PZT is formed over the seed layer and crystallized. By this process, the crystallinity of the thick PZT layer is much improved, and its orientation is improved to be in the (111) direction. Furthermore, the seed layer reduces downward diffraction of Pb from the thick PZT layer, such as through the AlOinto a TEOS structure beneath.

Process for fabrication of a ferrocapacitor

A process for the fabrication of a ferroelectric capacitor comprising depositing a layer of Tiover an insulating layerof AlO, and oxidising the Ti layer to form a TiOlayerSubsequently, a layer of PZTis formed over the TiOlayerThe PZT layeris subjected to an annealing step in which, due to the presence of the TiOlayerit crystallises to form a layerwith a high degree of (111)-texture.

Process for fabrication of a ferroelectric capacitor

A process for fabricating a ferrocapacitor comprises etching a layer of amorphous PZT formed over a layer having a low concentration of nucleation centres for PZT crystallisatlon. The etching step forms individual PZT elements. The side surfaces of the PZT elements are then coated with a layer of a material which promotes crystallisation of the PZT, such as one having a high concentration of PZT crystallisation centres (e.g. TiO), and a PZT annealing step is carried out. The result is that the PZT has a high degree of crystallisation, with grain boundaries extending substantially horizontally through the PZT elements.

A method of forming a contact to an underlayer of a device includes the steps of forming a contact hole, forming a contact hole barrier layer of a barrier material in the contact hole of the device, etching the contact hole barrier layer on the bottom surface of the contact hole, depositing a liner material in the contact hole, and filling the contact hole with a conductive material. A device such as a semiconductor, passive device, capacitor or FeRAM is formed in accordance with the method. The portions of the contact hole barrier layer on the side walls of the contact hole inhibit lateral diffusion of hydrogen and/or oxygen. The contact hole barrier layer can be performed after a wet etch process to fill voids in an existing barrier layer caused by that process, or prior to the wet etch process to prevent damage to the existing barrier layer.

Formation of a contact in a device, and the device including the contact

A ferroelectric capacitor device comprises a substrate, a contact plug passing through the substrate, a first electrode formed on the substrate, the first electrode being electrically connected to said plug, a ferroelectric layer formed on the first electrode, a second electrode formed on the ferroelectric layer, one or more first encapsulation layers on the second electrode, the encapsulation layers extending over the device, and one or more hydrogen storage material layers on the encapsulation layers. One or more second encapsulation layers may be formed on the one or more hydrogen storage material layers.

Device for inhibiting hydrogen damage in ferroelectric capacitor devices

A barrier layer protecting, for example, a ferroelectric capacitor from hydrogen is described. The barrier layer comprises aluminum oxide with barrier enhancement dopants. The barrier enhancement dopants are selected from Ti, Hf, Zr, their oxides, or a combination thereof.

Barrier material

A capacitor structure having a capacitor with a top electrode, a bottom electrode, and a capacitor dielectric layer between the top and bottom electrodes is disclosed. The capacitor includes upper and lower portions. The demarcation between the upper and lower portion is located between top and bottom surfaces of the capacitor dielectric layer. A dielectric layer is provided on the sidewalls of the upper portion of the capacitor to prevent shorting between the electrodes that can be caused by a conductive fence formed during processing.

Avoiding shorting in capacitors

A multi-layer barrier for a ferroelectric capacitor includes an outdiffusion barrier layer permeable to both hydrogen and oxygen. The outdiffusion barrier layer covers the ferroelectric of the capacitor. Oxygen passes through the outdiffusion barrier layer into the ferroelectric during an oxygen anneal in order to repair damage to the ferroelectric caused during etching. The outdiffusion barrier layer reduces the decomposition of the ferroelectric by blocking molecules leaving the ferroelectric during the oxygen anneal. The multi-layer barrier also includes a hydrogen barrier layer deposited on the outdiffusion barrier layer after repair of the ferroelectric by the oxygen anneal. The hydrogen barrier layer allows the multi-layer barrier to block the passage of hydrogen into the ferroelectric during back-end processes.

Multi-layer barrier allowing recovery anneal for ferroelectric capacitors

Forming a capacitor, by (a) forming a matrix of ferroelectric capacitor elements on a substrate, (b) forming a CAP layer over the ferroelectric capacitor elements, and (c) etching the CAP layer to a more uniform thickness. A capacitor that has a substrate layer, a matrix of ferroelectric capacitor elements including a first electrode layer substantially fixed relative to the substrate, a second electrode layer, and a ferroelectric layer sandwiched between the first and second electrode layers is disclosed. The capacitor has a shoulder layer extending from the substrate to the matrix, and a CAP layer etched to have substantially constant thickness covering sides of the matrix extending beyond the substrate.

Ferroelectric capacitor and process for its manufacture

A ferroelectric capacitor encapsulation method for preventing hydrogen damage to electrodes and ferroelectric material of the capacitor. In general terms, the method for encapsulating a capacitor includes etching a bottom electrode of a capacitor to expose an underlying wafer surface. An undercut is etched between the capacitor and the wafer surface. The undercut is refilled with a barrier layer to reduce the diffusion of hydrogen from the surface of the wafer into the capacitor.

Encapsulation of ferroelectric capacitors

A method of forming a ferroelectric capacitor, in particular for use in a FeRAM or high-k DRAM application, and a capacitor made by the method. The method comprises forming a first layer which is patterned, for example by a reactive ion etching method. A ferroelectric material is then formed over the patterned first layer. The morphology of the ferroelectric material will be dependent upon the patterning of the first layer. The ferroeletric layer is then patterned, for example using a wet etching or a reactive ion etching method. The etching will depend upon the morphology of the ferroelectric layer. After etching the ferroelectric layer, a conductive layer is provided over the ferroelectric layer to form a first electrode of the capacitor. If the first layer is a conductive layer, this forms the second electrode. If the first layer is a non-conductive layer, the conductive layer is patterned to form both the first and second electrodes.

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Kanagawa-ken, Japan

Karl Hornik