Taiwan Semiconductor Manufacturing Comp. Ltd.

Karen Mai

Tze-Liang Lee

Shih-Chang Chen

Chien-Hao Chen

Chun-Feng Nieh

Ming-Fang Wang

Ming-Ho Yang

Yu Min Lin

Kun-Chih Lee

Liang-Gi Yo

A semiconductor device having well-defined profiles is disclosed. A p-type pocket/halo region is preferably formed along a channel-side border of the heavily doped source/drain region to neutralize diffused n-type elements. A diffusion-retarding region is formed to retard diffusion for both p-type and n-type impurities by substantially overlapping or extending beyond the p-type pocket/halo region and the N+ S/D region at least on the channel side.

Profile confinement to improve transistor performance

A method for fabricating a portion of an integrated circuit on a semiconductor substrate. The method includes cleaning the surface of the substrate, and forming a thin insulate over the substrate. The method also includes depositing a high dielectric constant (high-k) material over the thin insulate, and then performing a hydrogen-based anneal on the high-k material. The method further includes performing an oxygen-based anneal on the high-k material, wherein the hydrogen-based and oxygen-based anneals occur sequentially.

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Growing community of inventors

Jhonghe, Taiwan

Karen Mai