Taiwan Semiconductor Manufacturing Comp. Ltd.

Jung-Wei Lee

Ching-Hua Lee

Miao-Syuan Fan

Pei-Wei Lee

Ming-Te Chen

Ta-Hsiang Kung

Kuo-Yuan Ho

Wen-Chieh Huang

The present disclosure relates to a semiconductor device includes first and second source/drain (S/D) regions doped with lead (Pb) at a first dopant concentration. The semiconductor device also includes a channel region between the first and second S/D regions, where the channel region is doped with Pb at a second dopant concentration that is lower than the first dopant concentration. The semiconductor device further includes first and second S/D contacts in contact with the first and second S/D regions, respectively. The semiconductor device also includes a gate electrode over the channel region.

Semiconductor device with doped structure

A semiconductor device includes a substrate, a semiconductor structure suspending over the substrate and comprising a source region, a drain region, and a channel region disposed between the source region and the drain region. The channel region includes a doped two-dimensional (2D) material layer comprising a first portion on an upper surface of the channel region. The semiconductor device also includes an interfacial layer surrounding the channel region including the first portion of the doped 2D material layer, and a gate electrode surrounding the interfacial layer.

Channel structures including doped 2D materials for semiconductor devices

A semiconductor device includes a gate structure disposed over a channel region, a source/drain epitaxial layer disposed at a source/drain region, a nitrogen containing layer disposed on the source/drain epitaxial layer, a silicide layer disposed on the nitrogen containing layer, and a conductive contact disposed on the silicide layer.

Method of manufacturing a semiconductor device and a semiconductor device

A method for forming a fin-based transistor includes forming a fin on a substrate; overlaying at least an upper portion of the fin with nitrogen-based radicals, wherein the nitrogen-based radicals are distributed along a sidewall and over a top surface of the upper portion of the fin with respective different concentrations; and forming an oxide layer over the upper portion of the fin using a thermal oxidation process.

Method of forming oxide layer for FinFET device

Embodiments of method for cooling a wafer in an ion implantation process are provided. A method for cooling the wafer in the ion implantation process includes placing the wafer in a process module. The method also includes performing the ion implantation process on the wafer and simultaneously cooling the wafer in the process module. The method further includes removing the wafer from the process module. In addition, the method includes heating up the wafer.

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Hsinchu, Taiwan

Jung-Wei Lee