Samsung Electronics Co., Ltd.

Jung-soo Yoon

Jongwon Hong

Minjong Kim

In-Sun Park

Jong-myeong Lee

Jong-Won Hong

Jang-Hee Lee

Jong-Min Baek

Hei-seung Kim

Jaebeom Park

Keeyoung Jun

Choongrae Cho

Seonggil Park

Disclosed is a substrate processing apparatus. The substrate processing apparatus comprises a process chamber providing an inner space where a substrate is treated, a support unit disposed in the inner space and supporting the substrate, and a gas supply unit providing the inner space with a process gas required for generating plasma. The support unit comprises a base having a top surface on which the substrate is placed, a heater disposed in the base, and a coating layer formed on the top surface of the base.

Substrate processing apparatus

A deposition apparatus includes a chuck in a process chamber, the chuck having a top surface on which a substrate is loaded, a showerhead disposed over the chuck, and a fence extension disposed in the process chamber. Plasma is generated in a space between the showerhead and the loaded substrate during a deposition process. The fence extension at least partially confines the plasma in the space during the deposition process, thereby enabling improved thickness uniformity and reliability of a layer deposited on the loaded substrate during the deposition process.

Plasma-enhanced chemical vapor deposition (PE-CVD) apparatus and method of operating the same

A method of fabricating a semiconductor device includes forming switching devices on a substrate. A lower structure is formed in the substrate having the switching devices. A lower conductive layer is formed on the lower structure. Sacrificial mask patterns are formed on the lower conductive layer. Lower conductive patterns are formed by etching the lower conductive layer using the sacrificial mask patterns as an etch mask. An interlayer insulating layer is formed on the substrate having the lower conductive patterns. Interlayer insulating patterns are formed by planarizing the interlayer insulating layer until the sacrificial mask patterns are exposed. Openings exposing the lower conductive patterns are formed by removing the exposed sacrificial mask patterns. Upper conductive patterns self-aligned with the lower conductive patterns are formed in the openings.

Method of fabricating semiconductor device

Growing community of inventors

Hwaseong-si, South Korea

Jung-soo Yoon