Taiwan Semiconductor Manufacturing Comp. Ltd.

TSMC Nanjing Company, Limited

Other

Jung-Chih Tsao

Yao-Hsiang Liang

Chi-Ming Lu

Kei-Wei Chen

Chih-Chang Huang

Chi-Wen Liu

Yu-Ku Lin

Ying-Lang Wang

Yu-Sheng Wang

Chih-Hui Huang

Hsien-Ping Feng

Steven Lin

Li-Yen Fang

Ray Chuang

Jian-Ming Chen

Sheng-Chan Li

Hsi-Kuei Cheng

Ming-Yuan Cheng

Ching-Ho Hsu

Min Han Hsu

Shih-Chieh Chang

Chi-Cheng Hung

Chih-Tsung Lee

Chun-Chang Chen

Wen-Hsi Lee

Chen-Peng Fan

Han-Chieh Huang

Chyi Shyuan Chern

Shih-Chi Lin

Chun Che Lin

Shih-Ho Lin

Jian-Shin Tsai

Chih-Chung Chang

Miao-Cheng Liao

Shih-Tzung Chang

Yu-Ming Huang

Tain-Shang Chang

Phil Sun

Ying-Jing Lu

Ming-Yuang Cheng

Si-Kwua Cheng

Ke-Wei Chen

Chi-Wen Li

Jye-Wei Hsu

Hsien-Pin Fong

Shien-Ping Feng

Si-Kua Cheng

Che-Tsao Wang

Jchung-Chang Chen

A method of fabricating a semiconductor device includes forming a first film having a first film stress type and a first film stress intensity over a substrate and forming a second film having a second film stress type and a second film stress intensity over the first film. The second film stress type is different than the first film stress type. The second film stress intensity is about same as the first film stress intensity. The second film compensates stress induced effect of non-flatness of the substrate by the first film.

Method of forming semiconductor device

A method includes depositing a metallic hardmask over a dielectric layer. The method further includes etching a metallic hardmask opening in the metallic hardmask to expose a top surface of the dielectric layer. Th method further includes modifying a sidewall of the metallic hardmask opening by adding non-metal atoms into the metallic hardmask. The method further includes depositing a conductive material in the metallic hardmask opening.

Method of making a semiconductor device and semiconductor device

A method of forming a semiconductor device, comprising: forming a first conductive layer on an active device of a substrate; forming a dielectric layer on the first conductive layer; forming a through hole passing through the dielectric layer to expose a portion of the first conductive layer; conformally depositing a glue layer in the through hole to cover the portion of the first conductive layer comprising: forming a plurality of isolated lattices in an amorphous region at which the isolated lattices are uniformly distributed and extend from a top surface of the glue layer and terminate prior to reach a bottom of the glue layer, wherein the glue layer has a predetermined thickness; depositing a conductive material on the glue layer within the through hole, thereby forming a contact via; and forming a second conductive layer on the contact via over the first conductive layer.

Method for forming titanium nitride barrier with small surface grains in interconnects

The semiconductor device includes a semiconductor fin, and a gate stack over the semiconductor fin. The gate stack includes a gate dielectric layer over a channel region of the semiconductor fin, a work function material layer over the gate dielectric layer, wherein the work function material layer includes dopants, and a gate electrode layer over the work function material layer. The gate dielectric layer is free of the dopants.

Replacement metal gate device structure and method of manufacturing same

A method of making a dual damascene interconnect includes operations of depositing a metal hardmask over a dielectric layer; etching a metal hardmask opening in the metal hardmask to expose a top surface of the dielectric layer; etching at least one interconnect opening in the dielectric layer, to expose a top surface of a base conductive layer; modifying a sidewall of the metal hardmask opening; and depositing a conductive material in the metal hardmask opening and the at least one interconnect opening.

Poisoned metal layer with sloped sidewall for making dual damascene interconnect

Some embodiments of the present disclosure provide a back side illuminated (BSI) image sensor. The back side illuminated (BSI) image sensor includes a semiconductive substrate and an interlayer dielectric (ILD) layer at a front side of the semiconductive substrate. The ILD layer includes a dielectric layer over the semiconductive substrate and a contact partially buried inside the semiconductive substrate. The contact includes a silicide layer including a predetermined thickness proximately in a range from about 600 angstroms to about 1200 angstroms.

Image sensing device and manufacturing method thereof

A method of forming a deep trench isolation in a radiation sensing substrate includes: forming a trench in the radiation sensing substrate; forming a corrosion resistive layer in the trench, in which the corrosion resistive layer includes titanium carbon nitride having a chemical formula of TiCN, and x is in a range of 0.1 to 0.9; and filling a reflective material in the trench and over the corrosion resistive layer.

Method of forming deep trench isolation in radiation sensing substrate and image sensor device

A method of manufacturing a semiconductor structure includes receiving a substrate including a first side and a second side opposite to the first side; forming a recess extending between the first side and the second side; and disposing a conductive material in the recess to form a conductive via, wherein the conductive via includes an interface, a first portion adjacent to the first side and a second portion adjacent to the second side, the interface is disposed between the first portion and the second portion, an average grain size of the first portion is substantially different from an average grain size of the second portion.

Method of manufacturing semiconductor structure

A method includes method includes forming a dummy gate stack over a semiconductor substrate, wherein the semiconductor substrate is comprised in a wafer, removing the dummy gate stack to form a recess, forming a gate dielectric layer in the recess, and forming a metal layer in the recess and over the gate dielectric layer. The metal layer has an n-work function. A block layer is deposited over the metal layer using Atomic Layer Deposition (ALD). The remaining portion of the recess is filled with metallic materials, wherein the metallic materials are overlying the metal layer.

Block layer in the metal gate of MOS devices

A semiconductor device includes a substrate, a dielectric layer disposed on the substrate, and a conductive stack disposed within the dielectric layer. The conductive stack includes at least one first conductive layer, a second conductive layer disposed over the at least one first conductive layer, and a contact structure disposed between the at least one first conductive layer and the second conductive layer. The contact structure includes a contact via electrically connecting the at least one first conductive layer to the second conductive layer, and a glue layer conformal to sidewalls and a bottom surface of the contact via. The glue layer has isolated lattices and an amorphous region at which the isolated lattices are uniformly distributed.

Semiconductor device and method of forming the same

Semiconductor device having stress-neutralized film stack and method of fabricating same

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Tainan, Taiwan

Jung-Chih Tsao