Macronix International Co., Ltd.

Industrial Technology Research Institute

June-Min Yao

Chien-Chung Hung

Ming-Jer Kao

Ming-Jinn Tsai

Chung-Min Liu

Shu-Ya Hsu

Jui-Neng Tu

Cheng-Shun Chen

A re-oxidation process of a semiconductor device is described. A substrate having a stacked structure thereon is provided, wherein the stacked structure includes a polysilicon/tungsten silicide interface. A thin CVD oxide layer is formed on the substrate and the stacked structure with a chemical vapor deposition (CVD) process. Then, an oxidation process is performed to form a thermal oxide layer on the substrate and the stacked structure.

Re-oxidation process of semiconductor device

Multiple oxide layers with different thicknesses are formed on a semiconductor substrate with a silicon surface, having a first and second region. A sacrificial oxide layer is formed on the silicon surface to cover both the first region and the second region, with a mask layer formed on the surface of the sacrificial oxide layer. By defining and patterning the mask layer, a first opening and a second opening, having predetermined surface areas, are formed in portions of the first and second regions of the mask layer to expose portions of the. The sacrificial oxide layer has a surface area equal to the first predetermined surface area, and portions of the sacrificial oxide layer having a surface area equal to the second predetermined surface area. A linear nitrogen doping process is then performed to simultaneously implant nitrogen ions with a first and second predetermined concentration into the first and second region, through the first opening and the second opening, respectively. Thereafter, the mask layer and the sacrificial oxide layer are removed, respectively. An oxidation process is performed to two silicon oxide layers with different thicknesses in the first and second regions.

Method of forming multiple oxide layers with different thicknesses in a linear nitrogen doping process

A design for a trench DMOS transistor having improved current carrying capability is presented. The principal improvement lies in the periodic replacement of the individual cells in the array with a protection cell of a different size. When this is done it becomes possible to significantly increase the density of cells per unit area. This results in a corresponding improvement in the amount of channel area available to the device and hence an increase in its current carrying capability.

Power trench DMOS with large active cell density

Growing community of inventors

Hsinchu, Taiwan

June-Min Yao