Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Jun Hirota

Moto Yabuki

Yoko Iwakaji

Tsukasa Nakai

Kazunori Harada

Hideo Shinomiya

Kyoichi Suguro

Ichiro Mizushima

Hiroshi Kanno

Hisashi Kaneko

Kenichi Murooka

Mie Matsuo

Hirokazu Ishida

Haruko Akutsu

Hideyuki Tabata

Wakana Kai

Masako Kobayashi

A semiconductor measurement device includes an electrode provided in a semiconductor sample, and a probe contactable with the semiconductor sample. A driver moves a contact position of the probe with respect to the semiconductor sample. A power supply applies electric power between the probe and the electrode. A measurement operation portion measures a current flowing via the semiconductor sample between the probe and the electrode as a voltage applied between the probe and the electrode is changed, the measurement operation portion measuring the current flowing for each of plural measurement points of a surface of the semiconductor sample while causing the probe to scan the measurement points, or while sequentially bringing the probe into contact with the measurement points. A display displays a relationship between the voltage and the current measured at each of the measurement points.

Semiconductor measurement device and method of measuring semiconductor

A measuring method of a scanning probe microscopy moves the probe from the first measuring point to the second measuring point while the probe has contact with the object to be measured and a pressing force weaker than the first pressing force is applied between the probe and the object to be measured after the measurement at the first measuring point has ended, applies the first pressing force between the probe and the object to be measured until the tip end position of the probe reaches the first distance in the depth direction from the upper surface of the object to be measured, and measures the physical property information of the object to be measured after the tip end position of the probe has reached the first distance in the depth direction from the upper surface of the object to be measured at the second measuring point.

Measuring method of scanning probe microscopy using penetrative pressing force

A scanning probe microscope that includes a probe, a positioning unit configured to position a probe on a measurement sample, an excitation unit configured to excite the measurement sample at a predetermined frequency, a resonance unit configured to output a frequency modulation signal by converting a change of a capacitance of the measurement sample, a lock-in amplifier configured to output a differential capacitance signal obtained by extracting a predetermined frequency component and a harmonic component of the predetermined frequency of the demodulated signal, a conversion unit configured to output data indicative of a relationship between a voltage applied to the measurement sample and the capacitance, a detecting unit that detects a voltage value corresponding to a feature point of the relationship data, and a main measurement control unit that measures electrical characteristics of the measurement sample subjected to a DC bias voltage substantially equal to the feature point voltage.

Scanning probe microscope and measurement method using the same

A scanning probe microscope includes a stage on which a sample is mounted, a probe configured to measure a characteristic of the sample, and a controller configured to move the probe and the stage relative to each other along a scanning trajectory during measurement of the characteristic of the sample. The scanning trajectory includes a plurality of linear segments, wherein each pair of adjacent linear segments form an angle that is 90 degrees or less.

Scanning probe microscope

According to one embodiment, a nonvolatile memory device includes a word line interconnect layer, a bit line interconnect layer, a pillar, and charge bearing members. The word line interconnect layer includes a plurality of word lines extending in a first direction. The bit line interconnect layer includes a plurality of bit lines extending in a second direction that intersects the first direction. The pillar is disposed between each of the word lines and each of the bit lines. The charge bearing members contain a negative fixed charge, and provided on side faces of the pillars. The pillars includes a diode film provided with a p-type layer and an n-type layer and a variable resistance film stacked on the diode film. The charge bearing member is disposed on side faces of the p-type layer, and is not disposed on side faces of the n-type layer.

Nonvolatile memory device

According to one embodiment, a semiconductor device includes a plurality of silicon films. The plurality of silicon films are disposed on one plane and are made of polysilicon containing an impurity. A crystal orientation of each of the silicon films is a (311) orientation.

Semiconductor device and method for manufacturing the same

According to one embodiment, a method for manufacturing a memory device is disclosed. The method includes forming a silicon diode. At least an upper portion of the silicon diode is made of a semiconductor material containing silicon and doped with impurity. The method includes forming a metal layer made of a metal on the silicon diode. The method includes forming a metal nitride layer made of a nitride of the metal on the metal layer. The method includes forming a resistance change film. In addition, the method includes reacting the metal layer with the silicon diode and the metal nitride layer by heat treatment to form an electrode film containing the metal, silicon, and nitrogen.

Memory device and method for manufacturing same

According to one embodiment, a semiconductor memory device includes a word line interconnection layer, a bit line interconnection layer and a pillar. The word line interconnection layer includes a plurality of word lines which extend in a first direction. The bit line interconnection layer includes a plurality of bit lines which extend in a second direction crossing over the first direction. The pillar is arranged between each of the word lines and each of the bit lines. The pillar includes a silicon diode and a variable resistance film, and the silicon diode includes a p-type portion and an n-type portion. The word line interconnection layer and the bit line interconnection layer are alternately stacked, and a compressive force is applied to the silicon diode in a direction in which the p-type portion and the n-type portion become closer to each other.

Semiconductor memory device and method of manufacturing same

The memory cell is located at respective intersections between the first wirings and the second wirings. Each of the memory cells has a rectifier element and a variable resistance element connected in series. The rectifier element includes a p type first semiconductor region, and a n type second semiconductor region. The first semiconductor region is formed of, at least in part, silicon-germanium mixture (SiGe(0&#x3c;x&#x3c;=1)). The second semiconductor region is formed of silicon (Si).

Nonvolatile semiconductor memory device

A semiconductor device according to an embodiment of the present invention includes a line layer containing Cu (copper), an inter layer dielectric formed on the line layer, a via hole formed in the inter layer dielectric on the line layer, a first barrier layer formed on the line layer in the via hole, a second barrier layer formed on the first barrier layer and on a sidewall of the via hole, and a conductive layer formed on the second barrier layer and containing Al (aluminum).

Semiconductor device with two barrier layers formed between copper-containing line layer and aluminum-containing conductive layer

A method for manufacturing a semiconductor device includes forming a copper anti-diffusion film on a copper trench wiring layer, and forming an opening portion in the copper anti-diffusion film by laser ablation, the opening portion being formed in a region corresponding to an alignment region used for lithography process for forming an aluminum wiring on the copper trench wiring layer.

Growing community of inventors

Kanagawa-ken, Japan

Jun Hirota