Samsung Electronics Co., Ltd.

Ju-Mi Yun

Jae-young Ahn

Young-jin Noh

Kwang-Min Park

Dong-Chul Yoo

Hun-hyeong Lim

Jeon-Il Lee

Guk-Hyon Yon

Joong-Yun Ra

Young-Seon Son

Ki-Hyun Hwang

Jae-Ho Choi

Bi-O Kim

Eun-Yeoung Choi

A semiconductor device is provided as follows. A tunnel insulation layer is disposed on a substrate. The tunnel insulation layer includes a first silicon oxide layer, a second silicon oxide layer, and a silicon layer interposed between the first silicon oxide layer and the second silicon oxide layer. The silicon layer has a thickness smaller than a thickness of each of the first silicon oxide layer and the second silicon oxide layer. A gate pattern is disposed on the tunnel insulation layer.

Semiconductor devices and methods of manufacturing the same

Non-volatile semiconductor devices

Tunnel insulation layer structures and methods of manufacturing the same are disclosed. The tunnel insulation layer structures may include a first tunnel insulation layer, a second tunnel insulation layer, a third tunnel insulation layer, a fourth tunnel insulation layer and a fifth tunnel insulation layer. The first tunnel insulation layer on a substrate has a first band gap energy. The second tunnel insulation layer on the first tunnel insulation layer has a second band gap energy which is lower than the first band gap energy. The third tunnel insulation layer on the second tunnel insulation layer has a third band gap energy which is higher than the second band gap energy. The fourth tunnel insulation layer on the third tunnel insulation layer has a fourth band gap energy which is lower than the third band gap energy. The fifth tunnel insulation layer on the fourth tunnel insulation layer has a fifth band gap energy which is higher than the fourth band gap energy.

Tunnel insulation layer structures, methods of manufacturing the same, and vertical memory devices including the same

Growing community of inventors

Pocheon-si, South Korea

Ju-Mi Yun