Lg Electronics Inc.

Lg Philips Lcd Co., Inc.

Ju-Cheon Yeo

Sang-Gul Lee

Joon-Young Yang

Yong-Min Ha

Jae-Deok Park

Hong-Seok Choi

Thin film transistors and methods of fabricating thin film transistors having low OFF state leakage current. The OFF state leakage current reduction is achieved by using doping implantation energies such that the average penetration depth of the doping impurity into the semiconductor, the projected range Rp, is located below the surface of the semiconductor layer, and such that the concentration of impurities remaining at the surface of the semiconductor layer is relatively small.

Thin film transistor and fabricating method thereof

The present invention relates to a thin film transistor and a fabricating method thereof, wherein the source and drain wires are located on a substrate and a double gate structure is provided, whereby the driving capacity of on-current is improved and the degradation of a device is reduced. The TFT includes a substrate, a source electrode, a drain electrode and a lower gate electrode on the substrate, a buffer layer covering an exposed surface of the substrate as well as the source, drain and lower gate electrodes. An active layer is formed on the buffer layer, wherein a source region, a drain region, lightly-doped (LD) regions and a channel region are formed in the active layer. A gate insulating layer is formed on the channel and LD regions. An upper gate electrode is then formed on the gate insulating layer over the channel region. A passivation layer then covers the upper gate electrode. A plurality of contact holes are formed in the buffer and passivation layers, wherein the contact holes expose the source and drain electrodes and the source and drain regions. A first interconnection wire connects the source electrode to the source region. A second interconnection wire connects the drain electrode to the drain region.

Thin film transistor having dual gate structure and a fabricating method thereof

A ramp signal application type of data driver in a liquid crystal display. The data driver includes a plurality of shift registers and sample and hold circuits that sample data lines. A plurality of timing control parts receive the sampled data from the sample and hold circuits and n timing signals having different periods from each other to thereby perform a logical operation. A plurality of transistors receive a ramp signal and are switched in accordance with the signals output by the timing control parts to output the ramp signal based on when the transistor is on and off.

Data driver for use in liquid crystal display

The present invention discloses a liquid crystal display device including a first insulating substrate having: a) a buffer layer formed on the first substrate; b) an inter-layer insulating film formed on the buffer layer, the inter-layer insulating film having an etching portion, the etching portion is etched; c) a semiconductor island formed on a portion of the buffer layer corresponding to the etching portion; d) data lines formed on the semiconductor island; e) gate lines arranged in a direction perpendicular to the data lines; f) switching elements arranged near cross points of the gate and data lines, each of the switching element having a gate electrode, a source electrode and a drain electrode, the gate electrode extending from the gate line, the source electrode extending from the data line; and g) pixel electrodes formed on a region defined by the gate and data lines, the pixel electrode connecting with the drain electrode, the pixel electrode overlapping an end portion of the data line, the adjacent two pixel electrodes spaced apart from each other; a second insulating substrate having a color filter; and a liquid crystal layer interposed between the first and second insulating substrates.

Liquid crystal display device and method of manufacturing the same

A method of fabricating a liquid crystal display includes the steps of forming a semiconductive layer with doped regions defining source regions, offset regions, channel regions, drain regions and first storage electrodes in an insulated substrate, simultaneously doping source and drain regions while doping the first storage electrodes with impurities selectively and heavily, forming a gate electrode on the channel region and a second storage electrode on the first storage electrode wherein the gate electrode has a gate insulating layer disposed thereunder and the second storage electrode has a storage capacitor insulating layer disposed thereunder, forming an insulating interlayer covering an exposed surface of the substrate which includes the gate electrode and the first storage electrode, forming contact holes exposing each of the source region and the drain region, forming a source wire connected to the source region and a drain wire connected to the drain region, forming a passivation layer covering an exposed surface of the substrate which includes the source wire and the drain wire, forming a contact hole exposing the drain wire, and forming a pixel electrode connected to the drain wire.

Reduction of masking and doping steps in a method of fabricating a

A thin film transistor array substrate of a liquid crystal display is provided which includes a substrate, a shorting bar on the substrate, and a plurality of gate lines connected to the shorting bar, each gate line having an electrically non-connection region and a connection region connecting the non-connection region to the shorting bar, wherein said connection region has a thickness such that the gate lines and the shorting bar are electrically separated from each other when the connection regions are anodized.

Shorting bar electrically disconnects from the electrodes

A method is provided for fabricating a thin film transistor on a substrate. The method includes the steps of forming an active layer having a channel region on the substrate, forming an impurity-blocking mask covering the channel region and portions of the active layer outside the channel region adjacent the channel region, and doping impurities of a first conductivity type at a high density into portions of the active layer uncovered by the impurity-blocking mask to form impurity-doped regions in the active layer. The method further includes the steps of removing the impurity-blocking mask and thereafter performing a plasma treatment on the resultant structure using a plasma gas containing impurities of the first conductivity type to form LDD regions in the active layer between the channel region and the impurity-doped regions.

Method of fabricating thin film transistors

Liquid crystal display having separable gate lines and gate shorting bar

A liquid crystal display includes a substrate, an active layer on the substrate, the active layer having a source region, a channel region and a drain region, a gate line including a gate electrode, the gate electrode overlapping the channel region of the active layer and the gate line having a gate insulating layer disposed underneath, an insulating interlayer covering the exposed surface of the substrate including the gate line, a first contact hole and a second contact hole exposing portions of the source region and the drain region in the insulating interlayer, respectively, a data line including a source electrode on the insulating interlayer, the source electrode connected to the source region and the data line crossing over the gate line, a drain electrode on the insulating interlayer, the drain electrode connected to the drain region, a passivation layer covering the exposed surface of the substrate including the data line and the drain electrode, a third contact hole exposing a portion of the drain electrode on the passivation layer, a pixel electrode connected to the drain electrode on the passivation layer, and a first etching preventing layer covering the crossing portion of the gate lines and the data lines.

Liquid crystal display with a protection layer formed by the layer used

A method and apparatus for controlling at least one transmission line in a liquid crystal display includes at least one transmission gate. The liquid crystal display includes a plurality of pixels, and each pixel includes a thin film transistor. At least one thin film transistor is connected to the transmission line. The transmission gate has first and second gates, an input and an output. The input is connected to the transmission line. The transmission gate transmits when one of a first voltage of said first gate is greater than a voltage of said input and a second voltage of said second gate is less than said voltage of said input. A first external terminal is connected to the first gate, a second external terminal is connected to the second gate, and a common external terminal is connected to the output of the transmission gate. When the first and second external terminals apply a floating potential, static electricity generated in the transmission line discharges through the transmission gate to the third external terminal. When a low and high voltage are respectively applied to the first and second external terminals, the transmission gate effectively isolates the transmission line. Alternatively, by applying a high and low voltage, respectively, to the first and second external terminals, the transmission line can be pre-charged via the transmission gate with a voltage applied to the common external terminal.

Liquid crystal display panel having a static electricity prevention

A thin-film transistor liquid crystal display includes a substrate, an active layer on the substrate, having first and second impurity regions and first, second, and third non-impurity regions, gate insulating layer on the active layer, first and second electric field control layers on the second and third non-impurity regions, respectively, first and second subsidiary gate electrodes on the first and second electric field control layers, respectively, and a main gate electrode on the gate insulating layer, the main gate electrode contacting the first and second subsidiary gate electrodes and the first and second electric field control layers, respectively.

Growing community of inventors

Anyang-shi, South Korea

Ju-Cheon Yeo