National Semiconductor Corporation

Other

Joseph O Smith

Shahram Mostafazadeh

Hem P Takiar

Luu Thanh Nguyen

Matthew Douglas Penry

Shahram Mostafazedeh

Ethan Warner

An engineered designed article providing multi-directional support. Portions of three or more overlapping, circular-like bodies are integrated on a flexible planar membrane into products, such as bandages, headgear, tool handles, lumbar pillows, backpacks, cervical supports, and back supports, to offer a multi-directional, (360&#xb0; quadrant) support or pressure-concentrating area, to enhance specific support at the medial, lateral, inferior and/or superior part of a body part. The article can be made of material that is waterproof, acts as a shock absorber, and provides multi-directional support. Medicaments can be infused into the pressure-concentrating area of the support or into the membrane itself. An aperture for accepting IV needles is also provided.

Anatomically engineered configured article

The invention includes a die-level opto-electronic device with a semiconductor die and a photonic device including a conductive structure formed in the die away from the edges of the die. The conductive structure is electrically connected to the photonic device. The device also includes an optically transparent laminate attached to overlay the photonic device. The invention also comprises a semiconductor wafer with a plurality of photonic devices exposed on a first surface and a plurality of conductive structures being exposed on a second surface opposing the first surface. The conductive structures are electrically connected to the photonic devices which are overlaid with an optically transparent laminate. The invention further includes methods of forming die-level opto-electronic devices and semiconductor wafers.

Die-level opto-electronic device and method of making same

Packages of semiconductor devices with non-opaque covers and methods for making the packages. The invention allows an encapsulant to be used with a non-opaque cover. By ensuring the cover is attached to a die in such a way as to expose bonding pads while sealing in the imaging portion of the die, the die can be electrically connected to a substrate and then encapsulated. Since the imaging portion is sealed, the encapsulant cannot get underneath the glass. By ensuring the encapsulant is not filled beyond the glass, encapsulant cannot get over the glass either.

Packaging of a semiconductor device with a non-opaque cover

A method for producing chip scale IC packages includes the step of mounting a lead frame panel on a temporary support fixture in order to provide support and protection during the manufacturing process. An embodiment of the temporary support fixture includes a sheet of sticky tape secured to a rigid frame. The rigid frame maintains tension in the sheet of sticky tape to provide a stable surface to which the lead frame panel can be affixed. Installation of IC chips and encapsulation in protective casings is performed as in conventional IC package manufacturing. If encapsulant material is to be dispensed over the IC chips, an encapsulant dam can be formed around the lead frame panel to contain the flow of encapsulant material. The temporary support fixture can be used in any IC package manufacturing process in which lead frames require supplemental support.

Lead frame chip scale package

An apparatus and method for force mounting semiconductor packages onto printed circuit boards without the use of solder. The apparatus includes a substrate, a first integrated circuit die mounted onto the substrate, a housing configured to house the first integrated circuit die mounted onto the substrate, and a force mechanism configured to force mount the housing including the integrated circuit die and substrate onto a printed circuit board. The method includes mounting a first integrated circuit die onto a first surface of a substrate, housing the first integrated circuit die mounted onto the substrate in a housing, and using a force mechanism to force mount the housing including the first integrated circuit die mounted on the substrate onto a printed circuit board. According to various embodiments, the force mechanism includes one of the following types of force mechanisms clamps, screws, bolts, adhesives, epoxy, or Instrument housings or heat stakes.

Apparatus and method for force mounting semiconductor packages to printed circuit boards

Multichip packages and methods for making same. The present invention generally allows for either the back of a flipchip, the back of a mother die, or both to be exposed in a multichip package. When the mother die is connected to the package contacts, the back of the flip chip is higher than the electrical connections. Accordingly, the back of the flip chip can be exposed. Furthermore, if a temporary tape substrate is used with a leadframe panel that does not have a die attach pad, the package can be even thinner. Once the temporary tape substrate is removed, both the back of the flipchip and the back of the mother die will be exposed from the encapsulant.

Multichip packages with exposed dice

In one embodiment of the invention, a die-level opto-electronic device comprises a semiconductor die having edges and a photonic device exposed on a first surface. The device includes a conductive structure formed in the die and away from the edges of the die, the conductive structure being exposed on a second surface of the die that opposes the first surface, wherein the conductive structure is electrically connected to the photonic device. The device also includes an optically transparent laminate attached to the first surface so as to overlay the photonic device. In another embodiment of the invention, a semiconductor wafer comprises a substrate having a plurality of photonic devices exposed on a first surface. A plurality of conductive structures is formed in the substrate, the plurality of structures being exposed on a second surface of the substrate that opposes the first surface, wherein ones of the plurality of structures are electrically connected to associated ones of the plurality of photonic devices. An optically transparent laminate is attached to the first surface so as to overlay the plurality of photonic devices. Methods of forming the die-level opto-electronic devices and semiconductor wafers of the invention are also described.

An optical integrated circuit application where the integrated circuit is packaged in a clear molding material and is attached to a printed circuit board having an aperture is described. The integrated circuit senses and/or emits light through the clear molding material and through the aperture in the printed circuit board.

Bumped integrated circuits for optical applications

Packaging of semiconductor device with a non-opaque cover

Semiconductor devices and methods for making semiconductor devices. The present invention allows a flip chip assembly to be used with an optical semiconductor device. The optical semiconductor flip chip is positioned over a hole in a PCB such that the imaging area of the optical semiconductor flip chip faces the hole. The hole allows the imaging area to be unobstructed by the PCB. Underfill material can be prevented from going into the hole by erecting a barrier on top of the PCB that surrounds the hole.

Flip chip optical semiconductor on a PCB

In one aspect of the invention, a lead frame panel suitable for use in packaging an array of integrated circuits is described. The lead frame panel includes a matrix of tie bars that extend in substantially perpendicular rows and columns to define a two dimensional array of immediately adjacent device areas separated only by the tie bars. Each device area is suitable for use in an independent integrated circuit package and includes a die attach pad and a plurality of conductive contacts. In another aspect of the invention, a panel assembly suitable for use in simultaneously packaging a multiplicity of integrated circuits is described. The panel assembly includes a lead frame panel formed from a conductive sheet. The lead frame panel is patterned to define at least one two dimensional array of adjacent device areas. Each device area is suitable for use as part of an independent integrated circuit package and including a die and a plurality of contacts positioned around and electrically connected to the die. A molded cap is also provided that substantially uniformly covers a two dimensional array of adjacent device areas while leaving bottom surfaces of the conductive contacts exposed to facilitate electrical connection to external components. The encapsulation material that forms the molded cap is exposed at a bottom surface of the panel of integrated circuits to physically isolate the contacts.

A package, a method of making and a method of assembly of packages for semiconductor chips are disclosed. The package includes a die attach pad on which a semiconductor die is mounted. A lead is electrically connected to the semiconductor die which is encapsulated in packaging material. The lead is exposed at opposed sides of the package. Exposing the lead on both sides of the package allows the package to be stacked or assembled so that the leads of adjacent pairs of packages are in electrical contact. Making the semiconductor packages includes forming a piece of electrically conductive material into a die attach pad and at least one lead associated with the die attach pad. A semiconductor die is mounted on the die attach pad and an electrical connection is made between the semiconductor die and the lead. The package is formed by encapsulation with the lead exposed on opposite sides of the package.

Growing community of inventors

Morgan Hill, CA, United States of America

Joseph O Smith