Taiwan Semiconductor Manufacturing Comp. Ltd.

Jong-Yuh Chang

Chih-Chiang Tu

Chun-Lang Chen

Hsin-Chang Lee

Pei-Cheng Hsu

Chien-Hung Lai

Boming Hsu

Biow-Hiem Ong

Chien-Chih Chen

Yun-Yue Lin

Tran-Hui Shen

Chue San Yoo

Chen-Shao Hsu

Chia-Jen Chen

Ta-Cheng Lien

Chien-Cheng Chen

Kun-Lung Hsieh

Tzu Yi Wang

Shih-Hao Yang

Chia-Shih Lin

Yih-Chen Su

Chi-Kuang Tsai

Yi-Fu Hsieh

Tzung-Shiun Lu

Kuang-Yu Liu

Chia-Shiung Tsai

Ping-Yin Liu

Cheng-Ming Lin

Chien-Chao Huang

Chih-Cheng Lin

Chun-Jen Chen

Chia-Wei Chang

Rick Lai

Meng-Lin Lu

Ching-Ting Yang

A pellicle includes a frame configured to attach to a photomask, wherein the frame includes a vent hole. The pellicle further includes a filter covering the vent hole, wherein the filter directly connects to an outer surface of the frame. The pellicle further includes a membrane extending over a top surface of the frame. The pellicle further includes a mount between the frame and the membrane, wherein the mount is attachable to the frame by an adhesive.

Pellicle having vent hole

A reflective mask includes a reflective multilayer over a substrate, a capping layer over the reflective multilayer, an absorber layer over the capping layer and including a top surface, and a protection layer directly on the top surface of the absorber layer. The absorber layer is formed of a first material and the protection layer is formed of a second material that is less easily to be oxidized than the first material.

Method for extreme ultraviolet lithography mask treatment

A method of removing a pellicle from a photomask includes removing a portion of a membrane from a pellicle frame, wherein the pellicle frame remains attached to the photomask following the removing of the portion of the membrane. The method further includes removing the pellicle frame from the photomask. The method further includes cleaning the photomask.

Pellicle removal method

A method comprises receiving a workpiece that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further comprises patterning the absorber layer to provide first trenches corresponding to circuit patterns on a wafer, and patterning the absorber layer, the capping layer, and the reflective multilayer to provide second trenches corresponding to a die boundary area on the wafer, thereby providing an extreme ultraviolet lithography (EUVL) mask. The method further comprises treating the EUVL mask with a treatment chemical that prevents exposed surfaces of the absorber layer from oxidation.

The present disclosure describes a method to form alignment marks on or in the top layer of an extreme ultraviolet (EUV) mask blank without the use of photolithographic methods. For example, the method can include forming a metal structure on the top layer of the EUV mask blank by dispensing a hexacarbonylchromium vapor on the top layer of the EUV mask and exposing the hexacarbonylchromium vapor to an electron-beam. The hexacarbonylchromium vapor is decomposed to form the metal structure at an area which is proximate to where the hexacarbonylchromium vapors interact with the electron-beam. In another example, the method can include forming a patterned structure in the top layer of an EUV mask blank with the use of an etcher aperture and an etching process.

Extreme ultraviolet alignment marks

A system and method for repairing a photolithographic mask is provided. An embodiment comprises forming a shielding layer over an absorbance layer on a substrate. Once the shielding layer is in place, the absorbance layer may be repaired using, e.g., an e-beam process to initiate a reaction to repair a defect in the absorbance layer, with the shielding layer being used to shield the remainder of the absorbance layer from undesirable etching during the repair process.

Image mask film scheme and method

An apparatus for increasing the uniformity in a critical dimension of chemical vapor deposition and etching during substrate processing, comprising a plurality of gas injectors for admitting a processing gas into an etching chamber. Each gas injector of the plurality of gas injectors is disposed along a track within the etching chamber and moveable along the track. Further, each gas injector is coupled with a throttling valve or nozzle to permit adjustment of processing gas flow rate. A method for increasing the uniformity in a critical dimension of chemical vapor deposition and etching during substrate processing includes performing a chemical deposition or etch using the plurality of moveable and adjustable gas injectors and measuring the critical dimension uniformity. Adjustments to the location of at least one gas injector or the processing gas flow rate to at least one gas injector are made to increase critical dimension uniformity.

Moveable and adjustable gas injectors for an etching chamber

A method includes depositing a first material layer over a first substrate; and depositing a graphene layer over the first material layer. The method further includes depositing an amorphous silicon layer over the graphene layer and bonding the amorphous silicon layer to a second substrate, thereby forming an assembly. The method further includes annealing the assembly, thereby converting the amorphous silicon layer to a silicon oxide layer. The method further includes removing the first substrate from the assembly and removing the first material layer from the assembly, thereby exposing the graphene layer.

Graphene pellicle for extreme ultraviolet lithography

A method for inspecting a manufactured product includes applying a first test regimen to the manufactured product to identify product defects. The first test regimen produces a first set of defect candidates. The method further includes applying a second test regimen to the manufactured product to identify product defects. The second test regimen produces a second set of defect candidates, and the second test regimen is different from the first test regimen. The method also includes generating a first filtered defect set by eliminating ones of the first set of defect candidates that are not identified in the second set of defect candidates.

Systems and methods eliminating false defect detections

The present disclosure relates to a method of inspecting a photomask to decrease false defects, which uses a plurality of image rendering models with varying emphasis on different design aspects, and an associated apparatus. In some embodiments, the method is performed by forming an integrated circuit (IC) design comprising a graphical representation of an integrated circuit. A first image rendering simulation is performed on the IC design using an initial image rendering model to determine a plurality of initial mask defects. A second image rendering simulation is performed on the IC design using a modified image rendering model that emphasizes a design aspect to determine a plurality of modified mask defects. By comparing the plurality of initial mask defects with the plurality of modified mask defects, falsely identified mask defects can be detected and eliminated.

Image process method to improve mask inspection performance

In some embodiments, a mask patterning system includes an electronic memory configured to store an integrated circuit mask layout. A computation tool determines a number of radiation shots to be used to write the integrated circuit mask layout to a physical mask. The computation tool also determines a scaling factor which accounts for expected thermal expansion of the physical mask due to the number of radiation shots used in writing the integrated circuit mask layout to the physical mask. An ebeam or laser writing tool writes the integrated circuit mask layout to the physical mask based on the scaling factor and by using the number of radiation shots.

Mask overlay control

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Jhubei, Taiwan

Jong-Yuh Chang