Growing community of inventors

Pittsburgh, PA, United States of America

Jonathan Haigh

Average Co-Inventor Count = 7.23

ph-index = 8

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 296

Jonathan HaighVyacheslav Rovner (83 patents)Jonathan HaighIndranil De (82 patents)Jonathan HaighJeremy Cheng (82 patents)Jonathan HaighChristopher Hess (82 patents)Jonathan HaighDennis Ciplickas (82 patents)Jonathan HaighLarg H Weiland (82 patents)Jonathan HaighSherry F Lee (82 patents)Jonathan HaighTomasz Brozek (82 patents)Jonathan HaighJohn Kibarian (82 patents)Jonathan HaighKimon Michaels (82 patents)Jonathan HaighHans Eisenmann (82 patents)Jonathan HaighSheng-Che Lin (82 patents)Jonathan HaighStephen Lam (82 patents)Jonathan HaighRakesh Vallishayee (82 patents)Jonathan HaighAndrzej Strojwas (82 patents)Jonathan HaighMarkus Rauscher (82 patents)Jonathan HaighCarl Taylor (82 patents)Jonathan HaighKelvin Doong (82 patents)Jonathan HaighConor O'Sullivan (82 patents)Jonathan HaighTimothy Fiscus (82 patents)Jonathan HaighMarcin Strojwas (82 patents)Jonathan HaighNobuharu Yokoyama (82 patents)Jonathan HaighSimone Comensoli (82 patents)Jonathan HaighMarci Liao (82 patents)Jonathan HaighHideki Matsuhashi (82 patents)Jonathan HaighMatthew Moe (6 patents)Jonathan HaighElizabeth Lagnese (5 patents)Jonathan HaighJonathan Haigh (95 patents)Vyacheslav RovnerVyacheslav Rovner (84 patents)Indranil DeIndranil De (115 patents)Jeremy ChengJeremy Cheng (114 patents)Christopher HessChristopher Hess (111 patents)Dennis CiplickasDennis Ciplickas (104 patents)Larg H WeilandLarg H Weiland (96 patents)Sherry F LeeSherry F Lee (91 patents)Tomasz BrozekTomasz Brozek (90 patents)John KibarianJohn Kibarian (90 patents)Kimon MichaelsKimon Michaels (90 patents)Hans EisenmannHans Eisenmann (87 patents)Sheng-Che LinSheng-Che Lin (87 patents)Stephen LamStephen Lam (86 patents)Rakesh VallishayeeRakesh Vallishayee (86 patents)Andrzej StrojwasAndrzej Strojwas (84 patents)Markus RauscherMarkus Rauscher (83 patents)Carl TaylorCarl Taylor (83 patents)Kelvin DoongKelvin Doong (82 patents)Conor O'SullivanConor O'Sullivan (82 patents)Timothy FiscusTimothy Fiscus (82 patents)Marcin StrojwasMarcin Strojwas (82 patents)Nobuharu YokoyamaNobuharu Yokoyama (82 patents)Simone ComensoliSimone Comensoli (82 patents)Marci LiaoMarci Liao (82 patents)Hideki MatsuhashiHideki Matsuhashi (82 patents)Matthew MoeMatthew Moe (7 patents)Elizabeth LagneseElizabeth Lagnese (6 patents)
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Inventor’s number of patents
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Strength of working relationships

Company Filing History:

1. Pdf Solutions, Incorporated (95 from 203 patents)


95 patents:

1. 11107804 - IC with test structures and e-beam pads embedded within a contiguous standard cell area

2. 11081476 - IC with test structures and e-beam pads embedded within a contiguous standard cell area

3. 11081477 - IC with test structures and e-beam pads embedded within a contiguous standard cell area

4. 11075194 - IC with test structures and E-beam pads embedded within a contiguous standard cell area

5. 11018126 - IC with test structures and e-beam pads embedded within a contiguous standard cell area

6. 10978438 - IC with test structures and E-beam pads embedded within a contiguous standard cell area

7. 10854522 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas

8. 10803221 - Snap-to valid pattern system and method

9. 10777472 - IC with test structures embedded within a contiguous standard cell area

10. 10622344 - IC chips containing a mixture of standard cells obtained from an original set of design rules and enhanced standard cells that are a substantially uniform variant of the original set of design rules and methods for making the same

11. 10593604 - Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells

12. 10290552 - Methods for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage

13. 10269786 - Integrated circuit containing first and second DOEs of standard Cell Compatible, NCEM-enabled Fill Cells, with the first DOE including tip-to-side short configured fill cells, and the second DOE including corner short configured fill cells

14. 10263011 - Process for making ICs from standard logic cells that utilize TS cut mask(s) and avoid DFM problems caused by closely spaced gate contacts and TSCUT jogs

15. 10211111 - Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side sort, and corner short test areas

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