Micron Technology Incorporated

University of Minnesota

Jonathan D Harms

Wei Chen

Jonathan J Strand

Sukneet Singh Basuta

Shashank Bangalore Lakshman

Sunil S Murthy

Witold Kula

Glen Earl Hush

Jeremy Chritz

Timothy P Finkbeiner

Stephen J Kramer

Zahra Hosseinimakarem

David Hulton

Richard T Housley

Xiaosong Zhang

Nikolay A Mirin

Robert Dembi

Troy A Manning

Troy D Larsen

Manzar Siddik

Yi Hu

Suresh Ramarajan

Dmitry A Vengertsev

Tamara Schmitz

Jian-Ping Wang

Alyssa N Scarbrough

Kevin T Majerus

David J Lilja

Kristopher Kopel

Xiaofeng Yao

David W Overgaard

Andrew P Lyle

Dmitry Vengertsev

Shruti R Patil

Sunil Murthy

An image or a spectrum of a surface may be acquired by a computing device, which may be included in a mobile device in some examples. The computing device may extract a measured spectrum from the image and generate a corrected spectrum of the surface. In some examples, the corrected spectrum may be generated to compensate for ambient light influence. The corrected spectrum may be analyzed to provide a result, such as a diagnosis or a product recommendation. In some examples, the result is based, at least in part, on a comparison of the corrected spectrum to reference spectra. In some examples, the result is based, at least in part, on an inference of a machine learning model.

Apparatuses and methods for color matching and recommendations

Methods, systems, and devices for imprint recovery management for memory systems are described. In some cases, memory cells may become imprinted, which may refer to conditions where a cell becomes predisposed toward storing one logic state over another, resistant to being written to a different logic state, or both. Imprinted memory cells may be recovered using a recovery or repair process that may be initiated according to various conditions, detections, or inferences. In some examples, a system may be configured to perform imprint recovery operations that are scaled or selected according to a characterized severity of imprint, an operational mode, environmental conditions, and other factors. Imprint management techniques may increase the robustness, accuracy, or efficiency with which a memory system, or components thereof, can operate in the presence of conditions associated with memory cell imprinting.

Imprint management for memory

A method for measuring overlay between an interest level and a reference level of a wafer includes applying a magnetic field to a wafer, detecting at least one residual magnetic field emitted from at least one registration marker of a first set of registration markers within the wafer, responsive to the detected one or more residual magnetic fields, determining a location of the at least one registration marker of the first set registration markers, determining a location of at least one registration marker of a second set of registration markers, and responsive to the respective determined locations of the at least one registration marker of the first set of registration markers and the at least one registration marker of the second set of registration markers, calculating a positional offset between an interest level of the wafer and a reference level of the wafer. Related methods and systems are also disclosed.

Wafer registration and overlay measurement systems and related methods

Methods, systems, and devices for on-die testing for a memory device are described. In some examples, a memory die may include processing circuitry configured to perform evaluations of the memory die based on commands or instructions received from an external device. The processing circuitry may be configured to detect failures of the memory die and transmit related indications to the external device based on the on-die detection. In some examples, the processing circuitry may be configured to communicate failure information at a finer granularity than information associated with expected or nominal behavior. Additionally or alternatively, the processing circuitry may be configured to perform operations according to an internally-generated clock signal that operates at a faster rate or speed than a clock signal from the external device. In some examples, the processing circuitry may include an analog-to-digital conversion capability for digital communication of analog characteristics internal to the memory die.

On-die testing for a memory device

Methods, systems, and devices for imprint recovery for memory arrays are described. In some cases, memory cells may become imprinted, which may refer to conditions where a cell becomes predisposed toward storing one logic state over another, resistant to being written to a different logic state, or both. Imprinted memory cells may be recovered using a recovery or repair process that may be initiated according to various conditions, detections, or inferences. In some examples, a system may be configured to perform imprint recovery operations that are scaled or selected according to a characterized severity of imprint, an operational mode, environmental conditions, and other factors. Imprint management techniques may increase the robustness, accuracy, or efficiency with which a memory system, or components thereof, can operate in the presence of conditions associated with memory cell imprinting.

Imprint recovery for memory arrays

Methods and apparatus for using characterized devices such as memories. In one embodiment, characterized memories are associated with a range of performances over a range of operational parameters. The characterized memories can be used in conjunction with a solution density function to optimize memory searching. In one exemplary embodiment, a cryptocurrency miner can utilize characterized memories to generate memory hard proof-of-work (POW). The results may be further validated against general compute memories; such that only valid solutions are broadcasted to the mining community. In one embodiment, the validation mechanism is implemented for a plurality of searching apparatus in parallel to provide a more distributed and efficient approach. Various other applications for characterized memories are also described in greater detail herein (e.g., blockchain, social media, machine learning, probabilistic applications and other error-tolerant applications).

Methods and apparatus for characterizing memory devices

Computerized apparatus using characterized devices such as memories for intensive computational applications such as blockchain processing. In one embodiment, the computerized apparatus comprises a computational appliance (e.g., stand-alone box, server blade, plug-in card, or mobile device) that includes characterized memory devices. These memory devices are associated with a range of performances over a range of operational parameters, and can be used in conjunction with a solution density function to optimize memory searching. In one embodiment, the ledger appliance can communicate with other ledger appliances to create and/or use a blockchain ledger so as to facilitate decentralized exchanges between untrusted parties. In some variants, the ledger appliance may additionally use an application programming interface (API) to dynamically generate blockchains on the fly. Various other applications are also described (e.g., social media, machine learning, probabilistic applications and other error-tolerant applications).

Distributed ledger appliance and methods of use

Methods, systems, and devices for imprint recovery for memory cells are described. In some cases, memory cells may become imprinted, which may refer to conditions where a cell becomes predisposed toward storing one logic state over another, resistant to being written to a different logic state, or both. Imprinted memory cells may be recovered using a recovery or repair process that may be initiated according to various conditions, detections, or inferences. In some examples, a system may be configured to perform imprint recovery operations that are scaled or selected according to a characterized severity of imprint, an operational mode, environmental conditions, and other factors. Imprint management techniques may increase the robustness, accuracy, or efficiency with which a memory system, or components thereof, can operate in the presence of conditions associated with memory cell imprinting.

Imprint recovery for memory cells

Imprint recovery management for memory systems

Methods, apparatuses, and systems for repairing defective memory cells in regions of a memory array associated with high or low priority levels are disclosed. A repair address generator may be configured to generate a memory address map for repair (e.g., blowing fuses at a fuse circuit), depending on whether certain applications may operate at a high priority level indicative of a low bit error rate or a low priority level indicative of a higher bit error rate. For example, a specified error rate associated with a low priority level may correspond to a threshold error rate for certain applications, such as a neural network application that stores trained weights. Such neural network applications may access trained weights being partially stored in defective memory cells, with the least significant bits of such trained weights being stored in defective memory cells that are not repaired according to the memory address map.

Apparatuses and methods for repairing defective memory cells based on a specified error rate for certain memory cells

Methods, systems, and devices for operational code storage for an on-die microprocessor are described. A microprocessor may be formed on-die with a memory array. Operating code for the microprocessor may be stored in the memory array, possibly along with other data (e.g., tracking or statistical data) used or generated by the on-die microprocessor. A wear leveling algorithm may result in some number of rows within the memory array not being used to store user data at any given time, and these rows may be used to store the operating code and possibly other data for the on-die microprocessor. The on-die microprocessor may boot and run based on the operating code stored in memory array.

Operational code storage for an on-die microprocessor

Data may be abstracted and/or masked prior to being provided to a machine learning model for training. A machine learning model may provide a confidence level associated with a result. If the confidence level is too high, the machine learning model or an application including the machine learning model may refrain from providing the result as an output. In some examples, the machine learning model may provide a 'second best' result that has an acceptable confidence level. In other examples, an error signal may be provided as the output. In accordance with examples of the present disclosure, data may be abstracted and/or masked prior to being provided to a machine learning model for training and confidence levels of results of the trained machine learning model may be used to determine when a result should be withheld.

Machine learning models based on altered data and systems and methods for training and using the same

Methods and apparatus for checking the results of characterized memory searches

Growing community of inventors

Boise, ID, United States of America

Jonathan D Harms