Motorola Corporation

Jonathan C Dahm

John G Franka

Bich-Yen Nguyen

Philip J Tobin

Paul T Lin

Israel A Lesk

Karl Emerson Mautz

Aubrey K Sparkman

Young Limb

Gregory S Ferguson

Robert K Berglund

Rolando J Osorio

Gary L Huffman

Joseph M Haas

Richard H Hogan

Kevin A Calhoun

Gregory E Bartlett

A layer of material (14) comprising silicon, such as an SiO.sub.2 layer, overlying a silicon substrate (12) of a semiconductor device (10), is dry etched without the need for traditional halocarbon gases (such as CHF.sub.3, CF.sub.4, and C.sub.2 F.sub.6) which are known green-house gases. A fluorine source, for producing the active fluorine radicals needed to etch silicon, is selected from either HF or F.sub.2 gases. A carbon-oxygen source, for providing and stabilizing polymer build-up in the reactor, is selected from either CO or CO.sub.2. An additional hydrogen source may be added as needed.

Dry etch method using non-halocarbon source gases

A single metal-plate bypass capacitor (10) includes a metal top plate (26) separated from a silicon substrate (12) by a thermally-grown, silicon dioxide dielectric (16) layer. An additional silicon plate (36) can be included intermediate to the metal top plate (26) and the silicon substrate (12) for multiple power supply devices. The silicon substrate (12) is electrically accessed through a metal contact pad (28) overlying a doped region (34) of the silicon substrate (12). The metal contact pad (28) is electrically isolated from the top plate (26) by an isolation structure (30). The bypass capacitor (10) is designed to be attached directly to the top surface of a semiconductor device (18), which enables the bypass capacitor (10) to be interconnected to the semiconductor device (18) by a plurality of bonding wires (25) having a minimal length. Because the capacitor dielectric (16) is formed as a very thin layer by the thermal oxidation of silicon, the self-inductance of bypass capacitor (10) is minimized.

Single metal-plate bypass capacitor

Contaminants are removed from a semiconductor material by heating the semiconductor material to temperature within the range of a minimum temperature where a halogen compound will decompose to halogen atoms without the use of ultraviolet irradiation and react with contaminants present on the semiconductor material and a maximum temperature of 800.degree. C., wherein less than or equal to approximately 50 Angstroms of oxide is formed on the semiconductor material. The ambient in which the semiconductor material is heated is an ambient comprised of a nonreactive gas and a halogen compound for at least a time sufficient to remove a substantial amount of contaminants from the semiconductor material.

Method of removing contaminants

A multi-tiered contact etch process comprising alternating anisotropic and isotropic etch steps is performed in a reactive ion etcher wherein DC bias on a cathode (11) of the etcher can be controlled independently from RF power, adding a great deal of control over isotropy of the etching. By shunting the cathode (11) directly to ground a high level of isotropy is achieved during isotropic etch steps. When the cathode (11) is not shunted to ground a bias voltage develops on the cathode (11) providing a highly anisotropic etching.

Controlled isotropy reactive ion etcher for multi-stepped sloped contact

In a process for depositing nitride on semiconductor wafers in a tube, streaks can develop on the wafers. The streaks are eliminated by using a quartz tube which has an inside surface coated with polysilicon for the nitride deposition.

Process for improving nitride deposition on a semiconductor wafer

In a process for depositing nitride on semiconductor wafers in a tube, streaks can develop on the wafers. The streaks are eliminted by flowing oxygen through the tube between nitride depositions of different groups of wafers.

Process for improving nitride deposition on a semiconductor wafer by

Growing community of inventors

Austin, TX, United States of America

Jonathan C Dahm