Lam Research Corporation

Northern Telecom Limited

Other

Strasbaugh

John M Boyd

Yezdi N Dordi

Shijian Li

John Martin De Larios

Fritz C Redeker

Hyungsuk Alexander Yoon

Joseph P Ellul

William Thie

Aleksander Owczarz

Sing P Tay

Mikhail Korolik

Alan M Schoepp

John P Parks

Tiruchirapalli Arunagiri

Todd Alan Balisky

Clint Thomas

Jacob Wylie

Stephan H Wolf

Michael B Rowlandson

Arthur M Howald

Mark Henry Wilcoxson

John M deLarios

Randolph E Treur

Robert E W Hancock

Praveen Nalla

Seokmin Yun

Zhonghui Alex Wang

Tiruchirapalli Arunagirí

David G Hancock

Olga M Pena Serrato

A method of diagnosing severe sepsis prior to definitive clinical diagnosis. A pattern of gene expression that correlates strongly with a future diagnosis of severe sepsis and organ failure was identified in patients who had their blood drawn at first clinical presentation. The methods comprise identifying a pattern of two or more polynucleotides, whereby the altered expression of these polynucleotides correlates with prospective and actual sepsis. Also methods of identifying agents for treating sepsis based on the characteristics of this gene expression pattern are provided.

Diagnostic for sepsis

A proximity heads for dispensing reactants and purging gas to deposit a thin film by Atomic Layer Deposition (ALD) includes a plurality of sides. Extending over a portion of the substrate region and being spaced apart from the portion of the substrate region when present, the proximity head is rotatable so as to place each side in a direction of the substrate region, and is disposed in a vacuum chamber coupled to a carrier gas source to sustain a pressure for the proximity head during operation. Each side of the proximity head includes a gas conduit through which the reactant gas and the purging gas are sequentially dispensed, and at least two separate vacuum conduits on each side of the gas conduit to pull excess reactant gas, purging gas, or deposition byproducts from a reaction volume between a surface of the proximity head facing the substrate and the substrate.

Apparatus and method for atomic layer deposition

A semiconductor wafer electroless plating apparatus includes a platen and a fluid bowl. The platen has a top surface defined to support a wafer, and an outer surface extending downward from a periphery of the top surface to a lower surface of the platen. The fluid bowl has an inner volume defined by an interior surface so as to receive the platen, and wafer to be supported thereon, within the inner volume. A seal is disposed around the interior surface of the fluid bowl so as to form a liquid tight barrier when engaged between the interior surface of the fluid bowl and the outer surface of the platen. A number of fluid dispense nozzles are positioned to dispense electroplating solution within the fluid bowl above the seal so as to rise up and flow over the platen, thereby flowing over the wafer when present on the platen.

Method and apparatus for wafer electroless plating

A chemical fluid handling system is defined to supply a number of chemicals to a number of fluid inputs of a mixing manifold. The chemical fluid handling system includes a number of fluid recirculation loops for separately pre-conditioning and controlling the supply of each of the number of chemicals. Each of the fluid recirculation loops is defined to degas, heat, and filter a particular one of the number of chemical components. The mixing manifold is defined to mix the number of chemicals to form the electroless plating solution. The mixing manifold includes a fluid output connected to a supply line. The supply line is connected to supply the electroless plating solution to a fluid bowl within an electroless plating chamber.

Fluid handling system for wafer electroless plating and associated methods

Methods and apparatuses for fabricating three-dimensional integrated circuits having through hole vias are provided. One aspect of the present invention is a method of gapfill for through hole vias for three-dimensional integrated circuits. The method comprises providing a semiconductor wafer having a plurality of holes for through hole vias and depositing a conformal metal layer to partially fill the holes to leave open voids. The method also includes purging the voids and cleaning the surface of the voids and using a dry deposition process to fill or close the voids. Another aspect of the present invention is an electronic device structure for a three-dimensional integrated circuit.

Methods and apparatuses for three dimensional integrated circuits

A method of depositing a thin film by atomic layer deposition (ALD) on a substrate surface is disclosed. The disclosed method includes placing an ALD deposition proximity head above the substrate with at least one gas channel configured to dispense a gas to an active process region of the substrate surface. The ALD deposition proximity head extends over and is being spaced apart from the active process region of the substrate surface when present. After a pulse of a first reactant gas is dispensed on the active process region of the substrate surface underneath the proximity head, a pulse of a second reactant gas is dispensed on the active process region of the substrate surface underneath the proximity head to react with the first reactant gas to form a portion of the thin layer of ALD film on the surface of substrate underneath the proximity head.

Methods for atomic layer deposition

Presented are device structures and methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention.

Device with post-contact back end of line through-hole via integration

Presented are methods and systems for fabricating three-dimensional integrated circuits having large diameter through-hole vias. One embodiment of the present invention provides a method of processing a wafer having holes for through-hole vias. The method comprises plating a gapfill metal on the wafer. The method also comprises chemically or electrochemically deplating a portion of the overburden metal. The method further comprises using chemical mechanical planarization to planarize the gapfill metal and to remove the remaining overburden metal. Another embodiment of the present invention is an integrated system comprising a process chamber for containing the wafer, a plating component integrated with the process chamber, and a deplating component integrated with the process chamber. The plating component is configured to electrochemically plate a gapfill metal onto the wafer to a least partially fill the holes. The deplating component is configured to chemically or to electrochemically remove a portion of the overburden metal formed by the plating component.

Methods and systems for three-dimensional integrated circuit through hole via gapfill and overburden removal

A dry-in/dry-out system is disclosed for wafer electroless plating. The system includes an upper zone for wafer ingress/egress and drying operations. Proximity heads are provided in the upper zone to perform the drying operations. The system also includes a lower zone for electroless plating operations. The lower zone includes an electroless plating apparatus that implements a wafer submersion by fluid upwelling method. The upper and lower zones of the system are enclosed by a dual-walled chamber, wherein the inner wall is a chemically inert plastic and the outer wall is a structural metal. The system interfaces with a fluid handling system which provides the necessary chemistry supply and control for the system. The system is ambient controlled. Also, the system interfaces with an ambient controlled managed transfer module (MTM).

Wafer electroless plating system and associated methods

The embodiments provide apparatus and methods of depositing conformal thin film on interconnect structures by providing processes and systems using an atomic layer deposition (ALD). More specifically, each of the ALD systems includes a proximity head that has a small reaction volume right above an active process region of the substrate surface. The proximity head dispenses small amount of reactants and purging gas to be distributed and pumped away from the small reaction volume between the proximity head and the substrate in relatively short periods, which increases the through-put. In an exemplary embodiment, a proximity head for dispensing reactants and purging gas to deposit a thin film by atomic layer deposition (ALD) is provided. The proximity head is configured to sequentially dispensing a reactant gas and a purging gas to deposit a thin ALD film under the proximity head. The proximity head covers an active process region of a substrate surface. The proximity head also includes at least one vacuum channel to pull excess reactant gas, purging gas, or deposition byproducts from a reaction volume between a surface of the proximity head facing the substrate and the substrate. The proximity head includes a plurality of sides, each side being configured to dispense either a reactant gas or a purging gas on the substrate surface underneath the proximity head. Each side has at least one vacuum channel.

Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention.

Methods of post-contact back end of line through-hole via integration

An electroless plating chamber is provided. The electroless plating chamber includes a chuck configured to support a substrate and a bowl surrounding a base and a sidewall of the chuck. The base has an annular channel defined along an inner diameter of the base. The chamber includes a drain connected to the annular channel. The drain is capable of removing fluid collected from the chuck. A proximity head capable of cleaning and substantially drying the substrate is included in the chamber. A method for performing an electroless plating operation is also provided.

Apparatus for applying a plating solution for electroless deposition

Methods for cleaning semiconductor wafers following chemical mechanical polishing are provided. An exemplary method exposes a wafer to a thermal treatment in an oxidizing environment followed by a thermal treatment in a reducing environment. The thermal treatment in the oxidizing environment both removes residues and oxidizes exposed copper surfaces to form a cupric oxide layer. The thermal treatment in the reducing environment then reduces the cupric oxide to elemental copper. This leaves the exposed copper clean and in condition for further processing, such as electroless plating.

Growing community of inventors

Woodlawn, Canada

John M Boyd