Intel Corporation

John J Plombon

Adrien Lavoie

Harsono S Simka

Juan E Dominguez

Joseph Han

Ian A Young

Tanay Gosavi

Dmitri E Nikonov

Kaan Oguz

Chia-Ching Lin

Benjamin Buford

Sasikanth Manipatruni

James S Clarke

Christopher J Jezewski

Mark L Doczy

Valery M Dubin

James M Blackwell

Scott Bruce Clendenning

Ramanan Chebiam

Tejaswi K Indukuri

Patricio E Romero

David Michael Thompson

John D Peck

Han Wui Then

Noriyuki Sato

Kevin Lai Lin

Mauro J Kobrinsky

Bryan Clark Hendrix

David J Michalak

Carl H Naylor

Michael L McSwiney

Mansour Moinpour

Gregory T Stauf

Jiun-Ruey Chen

Emily Walker

Juan E Dominquez

Disclosed herein are diamondoid materials in quantum computing devices, as well as related methods, devices, and materials. For example, in some embodiments, a quantum computing device may include: qubit circuitry, an interconnect in conductive contact with the qubit circuitry, and a dielectric material proximate to the interconnect, wherein the dielectric material includes a diamondoid film.

Diamondoid materials in quantum computing devices

An apparatus is provided which comprises: a stack comprising a magnetic insulating material (MI such as EuS, EuO, YIG, TmIG, or GaMnAs) and a transition metal dichalcogenide (TMD such as MoS, MoSe, WS, WSe, PtS, PtSe, WTe, MoTe, or graphene), wherein the magnetic insulating material has a first magnetization; a magnet with a second magnetization, wherein the magnet is adjacent to the TMD of the stack; and an interconnect comprising a spin orbit material, wherein the interconnect is adjacent to the magnet.

Transition metal dichalcogenide based spin orbit torque memory device

An apparatus is provided which comprises: a stack comprising a magnetoelectric (ME such as BiFeO, (LaBi)FeO, LuFeO, PMN-PT, PZT, AlN, SmBiFeO, CrO, etc.) material and a transition metal dichalcogenide (TMD such as MoS, MoSe, WS, WSe, PtS, PtSe, WTe, MoTe, graphene, etc.); a magnet adjacent to a first portion of the TMD of the stack; a first interconnect adjacent to the magnet; a second interconnect adjacent to the ME material of the stack; and a third interconnect adjacent to a second portion of the TMD of the stack.

Transition metal dichalcogenide based magnetoelectric memory device

A magnetic memory device comprising a plurality of memory cells is disclosed. The memory device includes an array of memory cells where each memory cell includes a first material layer having a ferromagnetic material, a second material layer having ruthenium, and a third material layer having bismuth and/or antimony. The second material layer is sandwiched between the first material layer and the third material in a stacked configuration.

Magnetic memory device with ruthenium diffusion barrier

An apparatus is provided to improve spin injection efficiency from a magnet to a spin orbit coupling material. The apparatus comprises: a first magnet; a second magnet adjacent to the first magnet; a first structure comprising a tunneling barrier; a third magnet adjacent to the first structure; a stack of layers, a portion of which is adjacent to the third magnet, wherein the stack of layers comprises spin-orbit material; and a second structure comprising magnetoelectric material, wherein the second structure is adjacent to the first magnet.

Apparatus and method for boosting signal in magnetoelectric spin orbit logic

An apparatus is provided which comprises: a stack comprising a magnetoelectric (ME such as BiFeO, (LaBi)FeO, LuFeO3, PMN-PT, PZT, AlN, SmBiFeO, Cr2O, etc.) material and a transition metal dichalcogenide (TMD such as MoS, MoSe, WS, WSe, PtS, PtSe, WTe, MoTe, graphene, etc.); a magnet adjacent to a first portion of the TMD of the stack; a first interconnect adjacent to the magnet; a second interconnect adjacent to the ME material of the stack; and a third interconnect adjacent to a second portion of the TMD of the stack.

Embodiments of the present disclosure describe semiconductor devices with ruthenium phosphorus thin films and further describe the processes to deposit the thin films. The thin films may be deposited in a gate stack of a transistor device or in an interconnect structure. The processes to deposit the films may include chemical vapor deposition and may include ruthenium precursors. The precursors may contain phosphorus. A co-reactant may be used during deposition. A co-reactant may include a phosphorus based compound. A gate material may be deposited on the film in a gate stack. The ruthenium phosphorus film may be a metal diffusion barrier and an adhesion layer, and the film may be a work function metal for some embodiments. Other embodiments may be described and/or claimed.

Semiconductor devices having ruthenium phosphorus thin films

Embodiments of the present disclosure describe removing seams and voids in metal interconnects and associated techniques and configurations. In one embodiment, a method includes conformally depositing a metal into a recess disposed in a dielectric material to form an interconnect, wherein conformally depositing the metal creates a seam or void in the deposited metal within or directly adjacent to the recess and heating the metal in the presence of a reactive gas to remove the seam or void, wherein the metal has a melting point that is greater than a melting point of copper. Other embodiments may be described and/or claimed.

Seam healing of metal interconnects

Transition metal dry etch by atomic layer removal of oxide layers for device fabrication, and the resulting devices, are described. In an example, a method of etching a film includes reacting a surface layer of a transition metal species of a transition metal-containing film with a molecular oxidant species. The method also includes removing volatile fragments of the reacted molecular oxidant species to provide an oxidized surface layer of the transition metal species. The method also includes reacting the oxidized surface layer of the transition metal species with a molecular etchant. The method also includes removing the reacted oxidized surface layer of the transition metal species and the reacted molecular etchant by volatlilization.

Transition metal dry etch by atomic layer removal of oxide layers for device fabrication

A metal precursor and a method comprising decomposing a metal precursor on an integrated circuit device; and forming a metal from the metal precursor, wherein the metal precursor is selected from the group consisting of (i) a Co(CO)(RC&#x2261;CR), wherein Rand Rare individually selected from a straight or branched monovalent hydrocarbon group have one to six carbon atoms that may be interrupted and substituted; (ii) a mononuclear cobalt carbonyl nitrosyl; (iii) a cobalt carbonyl bonded to one of a boron, indium, germanium and tin moiety; (iv) a cobalt carbonyl bonded to a mononuclear or binuclear allyl; and (v) a cobalt(II) complex comprising nitrogen-based supporting ligands.

Method of forming a metal from a cobalt metal precursor

A method including applying an electric charge to a substrate in a chamber; introducing an organometallic substituent into the chamber, the organometallic substituent including a metal ligand and an organic ligand; and depositing a metal film by reducing the metal ligand of the organometallic substituent. A method including applying a removable electric charge to a substrate; in the presence of the applied electric charge, introducing an organometallic substituent into the chamber, the organometallic substituent including a metal ligand and an organic ligand; and depositing a metal film by reducing the metal ligand of the organometallic substituent. A method including introducing an organometallic substituent into the chamber, the organometallic substituent including a metal ligand and an organic ligand; and depositing a metal film by reducing the metal ligand of the organometallic substituent with an externally applied electric charge.

Surface charge enhanced atomic layer deposition of pure metallic films

Incompatible materials, such as copper and nitrided barrier layers, may be adhered more effectively to one another. In one embodiment, a precursor of copper is deposited on the nitrided barrier. The precursor is then converted, through the application of energy, to copper which could not have been as effectively adhered to the barrier in the first place.

Using unstable nitrides to form semiconductor structures

Described herein are metal gate electrode stacks including a low resistance metal cap in contact with a metal carbonitride diffusion barrier layer, wherein the metal carbonitride diffusion barrier layer is tuned to a particular work function to also serve as a work function metal for a pMOS transistor. In an embodiment, the work function-tuned metal carbonitride diffusion barrier prohibits a low resistance metal cap layer of the gate electrode stack from migrating into the MOS junction. In a further embodiment of the present invention, the work function of the metal carbonitride barrier film is modulated to be p-type with a pre-selected work function by altering a nitrogen concentration in the film.

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Portland, OR, United States of America

John J Plombon