International Business Machines Corporation

John F Vetrero

Glenn Graham Daves

Herbert I Stoller

Jason Lee Frankel

William Frederick Shutler

Anthony Wayne Sigler

Cathy Ann Zadany

Paul M Gaschke

Gobinda Das

Steven J Duda

Frederick L Taber, Jr

Angelo M Giaimo

A jogging structure for translating wiring connections from points in a first grid to corresponding points in a second grid in a chip carrier module is disclosed. In an exemplary embodiment, the structure includes a first translation layer, coupled to the first grid, the first translation layer translating the first grid in an x-axis direction. A second translation layer is coupled to the first translation layer, the second translation layer for translating said wiring connections from the first grid in a y-axis direction, the y-axis direction being orthogonal to the x-axis direction. The second translation layer is further coupled to the second grid.

Jogging structure for wiring translation between grids with non-integral pitch ratios in chip carrier modules

A nonresilient rigid test probe arrangement which is designed for testing the integrity of silicon semiconductor device wafers or chips, and which eliminates pliant conditions encountered by current text fixtures, which are adverse to the attainment of satisfactory test results with rigid probes. The test system interface assembly includes a rigid ceramic substrate which forms a pedestal over which the rigid probe makes electrical contact. A PC board is located on the opposite side of the ceramic substrate. A clamp ring retains the PC board to a test head system with mating precision reference surfaces formed therebetween. Pogo pin connectors extend between the PC board and the test head system. A stiffening element having a control aperture is bolted through the PC board to the clamp ring, all of which form a rigid test probe arrangement.

Wafer probe interface arrangement with nonresilient probe elements and support structure

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Highland, NY, United States of America

John F Vetrero