Sun Microsystems, Inc.

John E Will

David Hockanson

Sergiu Radu

Bidyut Kanti Sen

Steven R Boyle

An integrated circuit package includes EMI containment features. The EMI containment features may include a plurality of pins on a substrate of the integrated circuit package. The pins may be a peripheral row of pins in an array of pins. The pins may couple a lid of the package to at least one ground plane of a circuit board.

EMI grounding pins for CPU/ASIC chips

An integrated circuit package comprising EMI containment features. The EMI containment features include a first EMI containment configuration and a second EMI containment configuration. The second EMI containment configuration is disposed around the first EMI containment configuration. The first and second EMI containment configurations include vias coupled to at least one ground plane of the integrated circuit package.

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Pleasanton, CA, United States of America

John E Will