International Business Machines Corporation

John Charles Petrus

Bruce Bennett Doris

Ying Di Zhang

Kevin Shawn Petrarca

Wei Lu

Kaushik Arun Kumar

Terence Lawrence Kane

Brett H Engel

Karl W Barth

Chung-Ping Eng

Barry Jack Ginsberg

Dermott A Macpherson

A method for forming a dielectric cap layer over an interconnect layer formed by a back-end-of-the-line (BEOL) interconnect process, the interconnect process including: lithography, reactive ion etching (RIE), metal filling of BEOL conductors, and chemical-mechanical polishing (CMP), wherein a sacrificial material resides between conductors of the interconnect layer, and wherein the dielectric cap layer is made porous through an oxidation process.

Stress relaxation, selective nitride phase removal

A method of forming a transistor comprises disposing a planar platform (or pedestal, or layer) of silicon atop a support structure of oxide which is atop a substrate; forming gate structures both atop and beneath the planar platform; and forming source and drain diffusions within the planar platform. The gate structures which are formed beneath the planar platform may smaller than the planar platform, and may be aligned with the gate structures which are formed atop the planar platform. A transistor formed by the method is also disclosed.

Planar pedestal multi gate device

Methods of etching a semiconductor structure using ion milling with a variable-position endpoint detector to unlayer multiple interconnect layers, including low-k dielectric films. The ion milling process is controlled for each material type to maintain a planar surface with minimal damage to the exposed materials. In so doing, an ion beam mills a first layer and detects an endpoint thereof using an optical detector positioned within the ion beam adjacent the first layer to expose a second layer of low-k dielectric film. Once the low-k dielectric film is exposed, a portion of the low-k dielectric film may be removed to provide spaces therein, which are backfilled with a material and polished to remove the backfill material and a layer of the multiple interconnect metal layers. Still further, the exposed low-k dielectric film may then be removed, and the exposed metal vias polished.

Method of reworking structures incorporating low-k dielectric materials

A metrology process for increasing image contrast of a buried feature, comprising milling a selected surface of a substrate to expose a cross section of the buried feature; exposing the exposed cross section with a gas mixture, wherein the gas mixture comprises a flourine bearing compound; and irradiating the exposed cross section with a high energy beam to increase image contrast of the buried feature.

Metrology process for enhancing image contrast

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Stanfordville, NY, United States of America

John Charles Petrus