Globalfoundries Inc.

International Business Machines Corporation

John C Hall

Damyon L Corbin

Anthony K Stamper

Jeffrey P Gambino

Steven M Shank

Edward Crandal Cooney, Iii

Timothy Charles Krywanczyk

Jay Sanford Burnham

Charles F Musante

Gary L Milo

Brett T Cucci

Ian McCallum-Cook

George A Dunbar, Iii

Kenneth F McAvey, Jr

Patrick S Spinney

Thomas C Lee

Thomas W Weeks

Patrick A Raymond

Brian P Conchieri

Through-substrate vias (TSVs) extend through a high resistivity semiconductor substrate laterally spaced and isolated from an active device formed over the substrate by deep trench isolation (DTI) structures. The deep trench isolation structures may extend partially or entirely through the substrate, and may include an air gap. The deep trench isolation structures entirely surround the active device and the TSVs.

Ring isolated through-substrate vias for high resistivity substrates

The present disclosure relates to semiconductor structures and, more particularly, to a method to control depth of etch in deep via etching and related structures. The method includes: forming an interface within the substrate between an etch control dopant and material of the substrate; etching a via within substrate; and terminating the etching of the via at the interface upon detection of the interface.

Controlling of etch depth in deep via etching processes and resultant structures

Aspects of the present disclosure include a test structure that includes two or more devices. Each device includes a wire disposed within a dielectric and a first via disposed over the wire and in electrical contact with the wire. Each device includes a test pad electrically connected to the first via and a polysilicon resistor electrically connected to the wire. Each of the polysilicon resistors of the two or more devices are electrically tied together. A method for forming the interconnect structure to be used for testing is also provided.

Test structure for monitoring interface delamination

A backside metal ground plane with improved metal adhesion and methods of manufacture are disclosed herein. The method includes forming at least one through silicon via (TSV) in a substrate. The method further includes forming an oxide layer on a backside of the substrate. The method further includes forming a metalized ground plane on the oxide layer and in electrical contact with an exposed portion of the at least one TSV.

Backside metal ground plane with improved metal adhesion and design structures

Growing community of inventors

Williston, VT, United States of America

John C Hall