Infineon Technologies Ag

Infineon Technologies Austria Ag

Johannes Lodermeyer

Joachim Mahler

Edmund Riedl

Ralf Otremba

Thorsten Meyer

Josef Hoeglauer

Ivan Nikitin

Christian Geissler

Thomas Kilger

Claus Waechter

Franz-Xaver Muehlbauer

Dirk Hammerschmidt

Klaus Elian

Khalil Hosseini

Georg Meyer-Berg

Walter Hartner

Manfred Schneegans

Irmgard Escher-Poeppel

Maciej Wojnowski

Thorsten Scharf

Bernd Goller

Chau Fatt Chiang

Dominic Maier

Mathias Vaupel

Werner Robl

Chee Yang Ng

Ludwig Heitzer

Karsten Guth

Johann Strasser

Josef Höglauer

Cyrus Ghahremani

Matthias Steiert

Steffen Jordan

Reinhard Pufall

Manfred Schindler

Michael Ledutke

Martin Richard Niessner

Beng Keh See

Robert Bergmann

Oskar Neuhoff

Derek Debie

Klaus Schmidt

Patrick Schwarz

Kristina Mayer

Chiara Mariotti

A semiconductor apparatus comprises: a circuit board; a semiconductor package having a main surface, wherein the semiconductor package is arranged on the circuit board and the main surface faces the circuit board; a radio-frequency line element of the semiconductor package, which radio-frequency line element is arranged on the main surface or inside the semiconductor package, wherein the radio-frequency line element is designed to transmit a signal at a frequency of greater than 10 GHz; and an underfiller material arranged between the circuit board and the semiconductor package, wherein the radio-frequency line element and the underfiller material do not overlap in an orthogonal projection onto the main surface.

Semiconductor apparatuses with radio-frequency line elements, and associated manufacturing methods

A semiconductor device including an Integrated Circuit (IC) package and a plastic waveguide. The IC package includes a semiconductor chip; and an embedded antenna formed within a Redistribution Layer (RDL) coupled to the semiconductor chip, wherein the RDL is configured to transport a Radio Frequency (RF) signal between the semiconductor chip and the embedded antenna. The plastic waveguide is attached to the IC package and configured to transport the RF signal between the embedded antenna and outside of the IC package.

Semiconductor package with plastic waveguide

A method comprises: arranging a plurality of semiconductor chips above a carrier, wherein active main surfaces of the semiconductor chips face the carrier; filling a cavity with a molding material; pressing the semiconductor chips arranged on the carrier into the molding material; and separating the molding material with the semiconductor chips embedded therein from the carrier, wherein main surfaces of the semiconductor chips that are situated opposite the active main surfaces are covered by the molding material.

Methods for producing packaged semiconductor devices

A metallic interconnection and a semiconductor arrangement including the same are described, wherein a method of manufacturing the same may include: providing a first structure including a first metallic layer having protruding first microstructures; providing a second structure including a second metallic layer having protruding second microstructures; contacting the first and second microstructures to form a mechanical connection between the structures, the mechanical connection being configured to allow fluid penetration; removing one or more non-metallic compounds on the first metallic layer and the second metallic layer with a reducing agent that penetrates the mechanical connection and reacts with the one or more non-metallic compounds; and heating the first metallic layer and the second metallic layer at a temperature causing interdiffusion of the first metallic layer and the second metallic layer to form the metallic interconnection between the structures.

Metallic interconnect, a method of manufacturing a metallic interconnect, a semiconductor arrangement and a method of manufacturing a semiconductor arrangement

A microelectromechanical systems (MEMS) package assembly and a method of manufacturing the same is provided. The MEMS package assembly includes a substrate, a housing coupled to the substrate to form a cavity, wherein the housing includes a transparent plate disposed above and parallel to the substrate and is configured to permit a transmission of light therethrough, and a MEMS chip disposed within the cavity and including a first main surface proximal to the transparent plate and a second main surface opposite to the first main surface and coupled to the substrate. The MEMS chip is oriented such that the first main surface is tilted at a tilt angle with respect to the transparent plate.

Tilted chip assembly for optical devices

A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.

Semiconductor package with a through port for sensor applications

A semiconductor package includes a semiconductor die and a metal clip. In one embodiment, the semiconductor die is embedded in an insulating material and has a first surface facing in a first direction, a second surface facing in a second direction opposite the first direction and an edge extending between the first and second surfaces. The metal clip is embedded in the insulating material above the die and bonded to the second surface of the die. Part of the metal clip extends laterally beyond the edge of the die and vertically in the first direction to provide galvanic redistribution at the second surface of the die. Other embodiments of semiconductor packages are also provided.

Chip-embedded packages with backside die connection

A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.

Device including two power semiconductor chips and manufacturing thereof

A method of fabricating a semiconductor device. One embodiment provides a metal carrier. A semiconductor chip is provided. A porous layer is produced at a surface of at least one of the carrier and the semiconductor chip. The semiconductor chip is placed on the carrier. The resulting structure is heated until the semiconductor chip is attached to the carrier.

Method of fabricating a semiconductor device

A semiconductor package includes a leadframe defining a die pad, a chip electrically coupled to the die pad, encapsulation material covering the chip and the die pad, and a plurality of lead ends exposed relative to the encapsulation material and configured for electrical communication with the chip, and a nitrogen-containing hydrocarbon coating disposed over at least the lead ends of the leadframe, where the hydrocarbon coating is free of metal particles.

Semiconductor package

A method of making an integrated circuit including a composition of matter for electrodepositing of chromium is disclosed. One embodiment provides a bath having a solution of a chromium salt in a substantially anhydrous organic solvent, to uses of certain chromium salts for electrodepositing and to processes for electrodepositing chromium.

Method of making an integrated circuit including electrodeposition of metallic chromium

Growing community of inventors

Kinding, Germany

Johannes Lodermeyer