Applied Materials, Inc.

Joey Chiu

Yan Ye

Yunsang Kim

Xiaoye Zhao

Neungho Shin

Fang Tian

Li-Qun Xia

Ellie Y Yieh

Gerardo Delgadino

Tzu-Fang Huang

Wen H Zhu

Lihua Li

Heeyeop Chae

Lihua Li Huang

A method of fabricating an interconnect structure comprising etching a via into an upper low K dielectric layer and into a hardened portion of a lower low K dielectric layer. The via is defined by a pattern formed in a photoresist layer. The photoresist layer is then stripped, and a trench that circumscribes the via as defined by a hard mask is etched into the upper low K dielectric layer and, simultaneously, the via that was etched into the hardened portion of the lower low K dielectric layer is further etched into the lower low K dielectric layer. The result is a low K dielectric dual damascene structure.

Method of forming a low-K dual damascene interconnect structure

The present invention includes a process for selectively etching a low-k dielectric material formed on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a fluorine-rich fluorocarbon or hydrofluorocarbon gas, a nitrogen-containing gas, and one or more additive gases, such as a hydrogen-rich hydrofluorocarbon gas, an inert gas and/or a carbon-oxygen gas. The process provides a low-k dielectric to a photoresist mask etching selectivity ratio greater than about 5:1, a low-k dielectric to a barrier/liner layer etching selectivity ratio greater about 10:1, and a low-k dielectric etch rate higher than about 4000 &#x212b;/min.

Selective etching of carbon-doped low-k dielectrics

Growing community of inventors

Chung-Li, Taiwan

Joey Chiu